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git01.mediatek.com / filogic / uboot / 17ffd518485b3d4349e3452c8c7ed2e73eac3cbc / . / arch / arm / dts / rk3399-u-boot.dtsi
blob: ecd230c7202a0660ffe15033919e3d6f1b797c8b [file] [log] [blame]
Jagan Teki208badd2019-03-11 13:50:03 +0530[diff] [blame]1// SPDX-License-Identifier: GPL-2.0+
2/*
3 * Copyright (C) 2019 Jagan Teki <jagan@amarulasolutions.com>
4 */
Peter Robinson94fb4c42020-01-20 09:17:00 +0000[diff] [blame]5#define USB_CLASS_HUB 9
Jagan Teki208badd2019-03-11 13:50:03 +0530[diff] [blame]6
Simon Glass8251e032020-07-19 13:55:58 -0600[diff] [blame]7#include "rockchip-u-boot.dtsi"
8
Peter Robinson94fb4c42020-01-20 09:17:00 +0000[diff] [blame]9/ {
10 aliases {
11 mmc0 = &sdhci;
12 mmc1 = &sdmmc;
Jagan Teki77c31a82020-05-09 22:26:23 +0530[diff] [blame]13 pci0 = &pcie0;
Simon Glass8251e032020-07-19 13:55:58 -0600[diff] [blame]14 spi1 = &spi1;
Peter Robinson94fb4c42020-01-20 09:17:00 +0000[diff] [blame]15 };
Peter Robinsondd44a152019-11-09 20:30:05 +0000[diff] [blame]16
Peter Robinson94fb4c42020-01-20 09:17:00 +0000[diff] [blame]17 cic: syscon@ff620000 {
18 u-boot,dm-pre-reloc;
19 compatible = "rockchip,rk3399-cic", "syscon";
20 reg = <0x0 0xff620000 0x0 0x100>;
21 };
22
23 dfi: dfi@ff630000 {
24 u-boot,dm-pre-reloc;
25 reg = <0x00 0xff630000 0x00 0x4000>;
26 compatible = "rockchip,rk3399-dfi";
27 rockchip,pmu = <&pmugrf>;
28 clocks = <&cru PCLK_DDR_MON>;
29 clock-names = "pclk_ddr_mon";
30 };
31
Lin Jinhan3e714cf2020-03-31 17:39:57 +0800[diff] [blame]32 rng: rng@ff8b8000 {
33 compatible = "rockchip,cryptov1-rng";
34 reg = <0x0 0xff8b8000 0x0 0x1000>;
35 status = "disabled";
36 };
37
Peter Robinson94fb4c42020-01-20 09:17:00 +0000[diff] [blame]38 dmc: dmc {
39 u-boot,dm-pre-reloc;
40 compatible = "rockchip,rk3399-dmc";
41 devfreq-events = <&dfi>;
42 interrupts = <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH 0>;
43 clocks = <&cru SCLK_DDRCLK>;
44 clock-names = "dmc_clk";
45 reg = <0x0 0xffa80000 0x0 0x0800
46 0x0 0xffa80800 0x0 0x1800
47 0x0 0xffa82000 0x0 0x2000
48 0x0 0xffa84000 0x0 0x1000
49 0x0 0xffa88000 0x0 0x0800
50 0x0 0xffa88800 0x0 0x1800
51 0x0 0xffa8a000 0x0 0x2000
52 0x0 0xffa8c000 0x0 0x1000>;
53 };
54
55 pmusgrf: syscon@ff330000 {
56 u-boot,dm-pre-reloc;
57 compatible = "rockchip,rk3399-pmusgrf", "syscon";
58 reg = <0x0 0xff330000 0x0 0xe3d4>;
59 };
60
Simon Glass8251e032020-07-19 13:55:58 -0600[diff] [blame]61};
62
63#ifdef CONFIG_ROCKCHIP_SPI_IMAGE
64&binman {
65 rom {
66 filename = "u-boot.rom";
67 size = <0x400000>;
68 pad-byte = <0xff>;
69
70 mkimage {
71 args = "-n rk3399 -T rkspi";
72 u-boot-spl {
73 };
74 };
75 u-boot-img {
76 offset = <0x40000>;
77 };
78 u-boot {
79 offset = <0x300000>;
80 };
81 fdtmap {
82 };
83 };
Peter Robinsondd44a152019-11-09 20:30:05 +0000[diff] [blame]84};
Simon Glass8251e032020-07-19 13:55:58 -0600[diff] [blame]85#endif
Peter Robinsondd44a152019-11-09 20:30:05 +0000[diff] [blame]86
Peter Robinson94fb4c42020-01-20 09:17:00 +0000[diff] [blame]87&cru {
Peter Robinsondd44a152019-11-09 20:30:05 +0000[diff] [blame]88 u-boot,dm-pre-reloc;
89};
90
91&grf {
92 u-boot,dm-pre-reloc;
93};
94
95&pinctrl {
96 u-boot,dm-pre-reloc;
97};
98
Jagan Teki9b545852019-07-16 17:27:34 +0530[diff] [blame]99&pmu {
100 u-boot,dm-pre-reloc;
101};
102
Peter Robinsondd44a152019-11-09 20:30:05 +0000[diff] [blame]103&pmugrf {
104 u-boot,dm-pre-reloc;
105};
106
107&pmu {
108 u-boot,dm-pre-reloc;
109};
110
111&pmucru {
112 u-boot,dm-pre-reloc;
113};
114
Peter Robinsondd44a152019-11-09 20:30:05 +0000[diff] [blame]115&sdhci {
Jagan Teki5cc21182020-04-28 15:30:17 +0530[diff] [blame]116 max-frequency = <200000000>;
Peter Robinsondd44a152019-11-09 20:30:05 +0000[diff] [blame]117 u-boot,dm-pre-reloc;
118};
119
Jagan Teki208badd2019-03-11 13:50:03 +0530[diff] [blame]120&sdmmc {
121 u-boot,dm-pre-reloc;
Deepak Das4ef2ded2020-04-15 08:55:24 +0530[diff] [blame]122
123 /* mmc to sram can't do dma, prevent aborts transferring TF-A parts */
124 u-boot,spl-fifo-mode;
Jagan Teki208badd2019-03-11 13:50:03 +0530[diff] [blame]125};
Jagan Teki60c5fed2019-05-07 23:51:51 +0530[diff] [blame]126
127&spi1 {
128 u-boot,dm-pre-reloc;
129};
Jagan Teki2ff51fd2019-06-21 00:25:02 +0530[diff] [blame]130
131&uart0 {
132 u-boot,dm-pre-reloc;
133};
134
135&uart2 {
136 u-boot,dm-pre-reloc;
137};
Peter Robinsondd44a152019-11-09 20:30:05 +0000[diff] [blame]138
139&vopb {
140 u-boot,dm-pre-reloc;
141};
142
143&vopl {
144 u-boot,dm-pre-reloc;
145};