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wdenkf2140d52004-07-01 16:30:44 +00001/*
2 * Copyright (c) 2004 Cucy Systems (http://www.cucy.com)
3 * Curt Brune <curt@cucy.com>
4 *
5 * Configuation settings for evb4510 board.
6 *
7 * See file CREDITS for list of people who contributed to this
8 * project.
9 *
10 * This program is free software; you can redistribute it and/or
11 * modify it under the terms of the GNU General Public License as
12 * published by the Free Software Foundation; either version 2 of
13 * the License, or (at your option) any later version.
14 *
15 * This program is distributed in the hope that it will be useful,
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 * GNU General Public License for more details.
19 *
20 * You should have received a copy of the GNU General Public License
21 * along with this program; if not, write to the Free Software
22 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
23 * MA 02111-1307 USA
24 */
25
26#ifndef __CONFIG_H
27#define __CONFIG_H
28
29/*
30 * If we are developing, we might want to start u-boot from ram
31 * so we MUST NOT initialize critical regs like mem-timing ...
32 *
33 * Also swap the flash1 and flash2 addresses during debug.
34 *
35 */
36#define CONFIG_INIT_CRITICAL /* undef for developing */
37
38/*
39 * High Level Configuration Options
40 * (easy to change)
41 */
42#define CONFIG_ARM7 1 /* This is a ARM7 CPU */
43#define CONFIG_ARM_THUMB 1 /* this is an ARM7TDMI */
44#define CONFIG_S3C4510B 1 /* it's a S3C4510B chip */
45#define CONFIG_EVB4510 1 /* on an EVB4510 Board */
46
wdenk82db02f2004-07-11 22:19:26 +000047#define CONFIG_USE_IRQ
48#define CONFIG_STACKSIZE_IRQ (4*1024)
49#define CONFIG_STACKSIZE_FIQ (4*1024)
wdenkf2140d52004-07-01 16:30:44 +000050
51/*
52 * Size of malloc() pool
53 */
54#define CFG_MALLOC_LEN (CFG_ENV_SIZE + 128*1024)
55#define CFG_GBL_DATA_SIZE 128
56
57/*
58 * Hardware drivers
59 */
60#define CONFIG_DRIVER_S3C4510_ETH 1
61#define CONFIG_DRIVER_S3C4510_I2C 1
62#define CONFIG_DRIVER_S3C4510_UART 1
63#define CONFIG_DRIVER_S3C4510_FLASH 1
64
65/*
66 * select serial console configuration
67 */
wdenk82db02f2004-07-11 22:19:26 +000068#define CONFIG_SERIAL1 1 /* we use Serial line 1, could also use 2 */
wdenkf2140d52004-07-01 16:30:44 +000069
70/* allow to overwrite serial and ethaddr */
71#define CONFIG_ENV_OVERWRITE
72
73#define CONFIG_BAUDRATE 19200
74
75#define CONFIG_BOOTP_MASK (CONFIG_BOOTP_DEFAULT|CONFIG_BOOTP_BOOTFILESIZE)
76
77#define CONFIG_COMMANDS (CONFIG_CMD_DFL | CFG_CMD_PING)
78
79/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
80#include <cmd_confdefs.h>
81
82#define CONFIG_ETHADDR 00:40:95:36:35:33
83#define CONFIG_NETMASK 255.255.255.0
84#define CONFIG_IPADDR 10.0.0.11
85#define CONFIG_SERVERIP 10.0.0.1
86#define CONFIG_CMDLINE_TAG /* submit bootargs to kernel */
87
wdenk82db02f2004-07-11 22:19:26 +000088#define CONFIG_BOOTDELAY 2
89#define CONFIG_BOOTCOMMAND "tftp 100000 uImage"
90/* #define CONFIG_BOOTARGS "console=ttyS0,19200 initrd=0x100a0040,530K root=/dev/ram keepinitrd" */
wdenkf2140d52004-07-01 16:30:44 +000091
92#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
93#define CONFIG_KGDB_BAUDRATE 19200 /* speed to run kgdb serial port */
94#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */
95#endif
96
97/*
98 * Miscellaneous configurable options
99 */
100#define CFG_LONGHELP /* undef to save memory */
101#define CFG_PROMPT "evb4510 # " /* Monitor Command Prompt */
102#define CFG_CBSIZE 256 /* Console I/O Buffer Size */
103#define CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16) /* Print Buffer Size */
104#define CFG_MAXARGS 16 /* max number of command args */
105#define CFG_BARGSIZE CFG_CBSIZE /* Boot Argument Buffer Size */
106
wdenk82db02f2004-07-11 22:19:26 +0000107#define CONFIG_CMDLINE_TAG /* allow passing of command line args to linux */
108#define CONFIG_SETUP_MEMORY_TAGS
109#define CONFIG_INITRD_TAG
110
wdenkf2140d52004-07-01 16:30:44 +0000111#define CFG_MEMTEST_START 0x00000000 /* memtest works on */
112#define CFG_MEMTEST_END 0x00780000 /* 4 ... 8 MB in DRAM */
113
114#undef CFG_CLKS_IN_HZ /* everything, incl board info, in Hz */
115
116#define CFG_LOAD_ADDR 0x00000000 /* default load address */
117
wdenk82db02f2004-07-11 22:19:26 +0000118#define CFG_SYS_CLK_FREQ 50000000 /* CPU freq: 50 MHz */
119#define CFG_HZ 1000 /* decrementer freq: 1 KHz */
wdenkf2140d52004-07-01 16:30:44 +0000120
121 /* valid baudrates */
122#define CFG_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 }
123
124/*-----------------------------------------------------------------------
125 * Stack sizes
126 *
127 * The stack sizes are set up in start.S using the settings below
128*/
129#define CONFIG_STACKSIZE (128*1024) /* regular stack */
130#ifdef CONFIG_USE_IRQ
131#define CONFIG_STACKSIZE_IRQ (4*1024) /* IRQ stack */
132#define CONFIG_STACKSIZE_FIQ (4*1024) /* FIQ stack */
133#endif
134
135/*-----------------------------------------------------------------------
136 * Physical Memory Map after relocation
137 */
138#define CONFIG_NR_DRAM_BANKS 1 /* we have 1 banks of DRAM */
139#define PHYS_SDRAM_1 0x00000000 /* SDRAM Bank #1 */
140#define PHYS_SDRAM_1_SIZE 0x00800000 /* 8 MB */
141
142#define PHYS_FLASH_1 0x01000000 /* Flash Bank #1 */
143#define PHYS_FLASH_1_SIZE 0x00200000 /* 2 MB (one chip, 8bit access) */
144
145#define PHYS_FLASH_2 0x02000000 /* Flash Bank #2 */
146#define PHYS_FLASH_2_SIZE 0x00080000 /* 512KB (one chip, 8bit access) */
147
148#define CFG_FLASH_BASE PHYS_FLASH_1
149#define CFG_FLASH_SIZE PHYS_FLASH_1_SIZE
150
151/*-----------------------------------------------------------------------
152 * FLASH and environment organization
153 */
154#define CFG_MAX_FLASH_BANKS 1 /* max number of memory banks */
155#define CFG_MAX_FLASH_SECT 35 /* max number of sectors on one chip */
156#define CFG_MAIN_SECT_SIZE 0x00010000 /* main size of sectors on one chip */
157
158/* timeout values are in ticks */
159#define CFG_FLASH_ERASE_TOUT (4*CFG_HZ) /* Timeout for Flash Erase */
160#define CFG_FLASH_WRITE_TOUT (2*CFG_HZ) /* Timeout for Flash Write */
161
162/* environment settings */
163#define CFG_ENV_IS_IN_FLASH
164#undef CFG_ENV_IS_NOWHERE
165
166#define CFG_ENV_ADDR (CFG_FLASH_BASE + 0x20000) /* environment start address */
167#define CFG_ENV_SECT_SIZE 0x10000 /* Total Size of Environment Sector */
wdenk82db02f2004-07-11 22:19:26 +0000168#define CFG_ENV_SIZE 0x1000 /* max size for environment */
wdenkf2140d52004-07-01 16:30:44 +0000169
170#endif /* __CONFIG_H */