blob: 2195feeb658eb3fe386e2d0ab172da643fe6d51c [file] [log] [blame]
Tom Rini10e47792018-05-06 17:58:06 -04001/* SPDX-License-Identifier: GPL-2.0+ */
Angelo Dureghello67c4e482017-08-07 01:17:18 +02002/*
3 * Sysam stmark2 board configuration
4 *
5 * (C) Copyright 2017 Angelo Dureghello <angelo@sysam.it>
Angelo Dureghello67c4e482017-08-07 01:17:18 +02006 */
7
8#ifndef __STMARK2_CONFIG_H
9#define __STMARK2_CONFIG_H
10
Mario Six790d8442018-03-28 14:38:20 +020011#define CONFIG_HOSTNAME "stmark2"
Angelo Dureghello67c4e482017-08-07 01:17:18 +020012
Angelo Dureghello67c4e482017-08-07 01:17:18 +020013#define CONFIG_SYS_UART_PORT 0
Angelo Dureghello67c4e482017-08-07 01:17:18 +020014
15#define LDS_BOARD_TEXT \
16 board/sysam/stmark2/sbf_dram_init.o (.text*)
17
Angelo Dureghello67c4e482017-08-07 01:17:18 +020018#define CONFIG_EXTRA_ENV_SETTINGS \
19 "kern_size=0x700000\0" \
20 "loadaddr=0x40001000\0" \
21 "-(rootfs)\0" \
22 "update_uboot=loady ${loadaddr}; " \
23 "sf probe 0:1 50000000; " \
24 "sf erase 0 0x80000; " \
25 "sf write ${loadaddr} 0 ${filesize}\0" \
26 "update_kernel=loady ${loadaddr}; " \
27 "setenv kern_size ${filesize}; saveenv; " \
28 "sf probe 0:1 50000000; " \
29 "sf erase 0x100000 0x700000; " \
30 "sf write ${loadaddr} 0x100000 ${filesize}\0" \
31 "update_rootfs=loady ${loadaddr}; " \
32 "sf probe 0:1 50000000; " \
33 "sf erase 0x00800000 0x100000; " \
34 "sf write ${loadaddr} 0x00800000 ${filesize}\0" \
35 ""
36
37/* Realtime clock */
Angelo Dureghello67c4e482017-08-07 01:17:18 +020038#define CONFIG_RTC_MCFRRTC
39#define CONFIG_SYS_MCFRRTC_BASE 0xFC0A8000
40
Angelo Dureghello67c4e482017-08-07 01:17:18 +020041#define CONFIG_SYS_SBFHDR_SIZE 0x7
42
Angelo Dureghello67c4e482017-08-07 01:17:18 +020043/* Input, PCI, Flexbus, and VCO */
44#define CONFIG_EXTRA_CLOCK
45
46#define CONFIG_PRAM 2048 /* 2048 KB */
Angelo Dureghello67c4e482017-08-07 01:17:18 +020047
Angelo Dureghello67c4e482017-08-07 01:17:18 +020048#define CONFIG_SYS_MBAR 0xFC000000
49
50/*
51 * Definitions for initial stack pointer and data area (in internal SRAM)
52 */
53#define CONFIG_SYS_INIT_RAM_ADDR 0x80000000
54/* End of used area in internal SRAM */
55#define CONFIG_SYS_INIT_RAM_SIZE 0x10000
56#define CONFIG_SYS_INIT_RAM_CTRL 0x221
Tom Rinid5342e82022-05-24 13:40:05 -040057#define CONFIG_SYS_INIT_SP_OFFSET ((CONFIG_SYS_INIT_RAM_SIZE - \
Angelo Dureghello67c4e482017-08-07 01:17:18 +020058 GENERATED_GBL_DATA_SIZE) - 32)
Angelo Dureghello67c4e482017-08-07 01:17:18 +020059#define CONFIG_SYS_SBFHDR_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - 32)
60
61/*
62 * Start addresses for the final memory configuration
63 * (Set up by the startup code)
64 * Please note that CONFIG_SYS_SDRAM_BASE _must_ start at 0
65 */
66#define CONFIG_SYS_SDRAM_BASE 0x40000000
67#define CONFIG_SYS_SDRAM_SIZE 128 /* SDRAM size in MB */
68
Angelo Dureghello67c4e482017-08-07 01:17:18 +020069#define CONFIG_SYS_DRAM_TEST
70
71#if defined(CONFIG_CF_SBF)
72#define CONFIG_SERIAL_BOOT
73#endif
74
Angelo Dureghello67c4e482017-08-07 01:17:18 +020075/* Reserve 256 kB for Monitor */
76#define CONFIG_SYS_MONITOR_LEN (256 << 10)
Angelo Dureghello67c4e482017-08-07 01:17:18 +020077
78/*
79 * For booting Linux, the board info and command line data
80 * have to be in the first 8 MB of memory, since this is
81 * the maximum mapped by the Linux kernel during initialization ??
82 */
83/* Initial Memory map for Linux */
84#define CONFIG_SYS_BOOTMAPSZ (CONFIG_SYS_SDRAM_BASE + \
85 (CONFIG_SYS_SDRAM_SIZE << 20))
86
87/* Configuration for environment
88 * Environment is embedded in u-boot in the second sector of the flash
89 */
90
Angelo Dureghello67c4e482017-08-07 01:17:18 +020091/* Cache Configuration */
Angelo Dureghello67c4e482017-08-07 01:17:18 +020092#define ICACHE_STATUS (CONFIG_SYS_INIT_RAM_ADDR + \
93 CONFIG_SYS_INIT_RAM_SIZE - 8)
94#define DCACHE_STATUS (CONFIG_SYS_INIT_RAM_ADDR + \
95 CONFIG_SYS_INIT_RAM_SIZE - 4)
96#define CONFIG_SYS_ICACHE_INV (CF_CACR_BCINVA + CF_CACR_ICINVA)
97#define CONFIG_SYS_DCACHE_INV (CF_CACR_DCINVA)
98#define CONFIG_SYS_CACHE_ACR2 (CONFIG_SYS_SDRAM_BASE | \
99 CF_ADDRMASK(CONFIG_SYS_SDRAM_SIZE) | \
100 CF_ACR_EN | CF_ACR_SM_ALL)
101#define CONFIG_SYS_CACHE_ICACR (CF_CACR_BEC | CF_CACR_IEC | \
102 CF_CACR_ICINVA | CF_CACR_EUSP)
103#define CONFIG_SYS_CACHE_DCACR ((CONFIG_SYS_CACHE_ICACR | \
104 CF_CACR_DEC | CF_CACR_DDCM_P | \
105 CF_CACR_DCINVA) & ~CF_CACR_ICINVA)
106
107#define CACR_STATUS (CONFIG_SYS_INIT_RAM_ADDR + \
108 CONFIG_SYS_INIT_RAM_SIZE - 12)
109
Angelo Durgehello68d46ad2019-11-15 23:54:15 +0100110#ifdef CONFIG_MCFFEC
Angelo Durgehello68d46ad2019-11-15 23:54:15 +0100111#define CONFIG_SYS_DISCOVER_PHY
Angelo Durgehello68d46ad2019-11-15 23:54:15 +0100112/* If CONFIG_SYS_DISCOVER_PHY is not defined - hardcoded */
113#ifndef CONFIG_SYS_DISCOVER_PHY
114#define FECDUPLEX FULL
115#define FECSPEED _100BASET
Angelo Durgehello68d46ad2019-11-15 23:54:15 +0100116#endif /* CONFIG_SYS_DISCOVER_PHY */
117#endif
Angelo Dureghello67c4e482017-08-07 01:17:18 +0200118#endif /* __STMARK2_CONFIG_H */