Tom Rini | 53633a8 | 2024-02-29 12:33:36 -0500 | [diff] [blame] | 1 | // SPDX-License-Identifier: GPL-2.0 |
| 2 | |
| 3 | / { |
| 4 | cpu0_opp_table: opp-table-cpu0 { |
| 5 | compatible = "operating-points-v2"; |
| 6 | opp-shared; |
| 7 | |
| 8 | opp-51000000-800 { |
| 9 | clock-latency-ns = <100000>; |
| 10 | opp-supported-hw = <0x1F 0x31FE>; |
| 11 | opp-hz = /bits/ 64 <51000000>; |
| 12 | }; |
| 13 | |
| 14 | opp-51000000-850 { |
| 15 | clock-latency-ns = <100000>; |
| 16 | opp-supported-hw = <0x1F 0x0C01>; |
| 17 | opp-hz = /bits/ 64 <51000000>; |
| 18 | }; |
| 19 | |
| 20 | opp-51000000-912 { |
| 21 | clock-latency-ns = <100000>; |
| 22 | opp-supported-hw = <0x1F 0x0200>; |
| 23 | opp-hz = /bits/ 64 <51000000>; |
| 24 | }; |
| 25 | |
| 26 | opp-102000000-800 { |
| 27 | clock-latency-ns = <100000>; |
| 28 | opp-supported-hw = <0x1F 0x31FE>; |
| 29 | opp-hz = /bits/ 64 <102000000>; |
| 30 | }; |
| 31 | |
| 32 | opp-102000000-850 { |
| 33 | clock-latency-ns = <100000>; |
| 34 | opp-supported-hw = <0x1F 0x0C01>; |
| 35 | opp-hz = /bits/ 64 <102000000>; |
| 36 | }; |
| 37 | |
| 38 | opp-102000000-912 { |
| 39 | clock-latency-ns = <100000>; |
| 40 | opp-supported-hw = <0x1F 0x0200>; |
| 41 | opp-hz = /bits/ 64 <102000000>; |
| 42 | }; |
| 43 | |
| 44 | opp-204000000-800 { |
| 45 | clock-latency-ns = <100000>; |
| 46 | opp-supported-hw = <0x1F 0x31FE>; |
| 47 | opp-hz = /bits/ 64 <204000000>; |
| 48 | opp-suspend; |
| 49 | }; |
| 50 | |
| 51 | opp-204000000-850 { |
| 52 | clock-latency-ns = <100000>; |
| 53 | opp-supported-hw = <0x1F 0x0C01>; |
| 54 | opp-hz = /bits/ 64 <204000000>; |
| 55 | opp-suspend; |
| 56 | }; |
| 57 | |
| 58 | opp-204000000-912 { |
| 59 | clock-latency-ns = <100000>; |
| 60 | opp-supported-hw = <0x1F 0x0200>; |
| 61 | opp-hz = /bits/ 64 <204000000>; |
| 62 | opp-suspend; |
| 63 | }; |
| 64 | |
| 65 | opp-312000000-850 { |
| 66 | clock-latency-ns = <100000>; |
| 67 | opp-supported-hw = <0x1F 0x0C00>; |
| 68 | opp-hz = /bits/ 64 <312000000>; |
| 69 | }; |
| 70 | |
| 71 | opp-312000000-912 { |
| 72 | clock-latency-ns = <100000>; |
| 73 | opp-supported-hw = <0x1F 0x0200>; |
| 74 | opp-hz = /bits/ 64 <312000000>; |
| 75 | }; |
| 76 | |
| 77 | opp-340000000-800 { |
| 78 | clock-latency-ns = <100000>; |
| 79 | opp-supported-hw = <0x1F 0x0192>; |
| 80 | opp-hz = /bits/ 64 <340000000>; |
| 81 | }; |
| 82 | |
| 83 | opp-340000000-850 { |
| 84 | clock-latency-ns = <100000>; |
| 85 | opp-supported-hw = <0x0F 0x0001>; |
| 86 | opp-hz = /bits/ 64 <340000000>; |
| 87 | }; |
| 88 | |
| 89 | opp-370000000-800 { |
| 90 | clock-latency-ns = <100000>; |
| 91 | opp-supported-hw = <0x1E 0x306C>; |
| 92 | opp-hz = /bits/ 64 <370000000>; |
| 93 | }; |
| 94 | |
| 95 | opp-456000000-850 { |
| 96 | clock-latency-ns = <100000>; |
| 97 | opp-supported-hw = <0x1F 0x0C00>; |
| 98 | opp-hz = /bits/ 64 <456000000>; |
| 99 | }; |
| 100 | |
| 101 | opp-456000000-912 { |
| 102 | clock-latency-ns = <100000>; |
| 103 | opp-supported-hw = <0x1F 0x0200>; |
| 104 | opp-hz = /bits/ 64 <456000000>; |
| 105 | }; |
| 106 | |
| 107 | opp-475000000-800 { |
| 108 | clock-latency-ns = <100000>; |
| 109 | opp-supported-hw = <0x1E 0x31FE>; |
| 110 | opp-hz = /bits/ 64 <475000000>; |
| 111 | }; |
| 112 | |
| 113 | opp-475000000-850 { |
| 114 | clock-latency-ns = <100000>; |
| 115 | opp-supported-hw = <0x0F 0x0001>, <0x01 0x0002>, |
| 116 | <0x01 0x0010>, <0x01 0x0080>, |
| 117 | <0x01 0x0100>; |
| 118 | opp-hz = /bits/ 64 <475000000>; |
| 119 | }; |
| 120 | |
| 121 | opp-608000000-850 { |
| 122 | clock-latency-ns = <100000>; |
| 123 | opp-supported-hw = <0x1F 0x0400>; |
| 124 | opp-hz = /bits/ 64 <608000000>; |
| 125 | }; |
| 126 | |
| 127 | opp-608000000-912 { |
| 128 | clock-latency-ns = <100000>; |
| 129 | opp-supported-hw = <0x1F 0x0200>; |
| 130 | opp-hz = /bits/ 64 <608000000>; |
| 131 | }; |
| 132 | |
| 133 | opp-620000000-850 { |
| 134 | clock-latency-ns = <100000>; |
| 135 | opp-supported-hw = <0x1E 0x306C>; |
| 136 | opp-hz = /bits/ 64 <620000000>; |
| 137 | }; |
| 138 | |
| 139 | opp-640000000-850 { |
| 140 | clock-latency-ns = <100000>; |
| 141 | opp-supported-hw = <0x0F 0x0001>, <0x02 0x0002>, |
| 142 | <0x04 0x0002>, <0x08 0x0002>, |
| 143 | <0x02 0x0010>, <0x04 0x0010>, |
| 144 | <0x08 0x0010>, <0x02 0x0080>, |
| 145 | <0x04 0x0080>, <0x08 0x0080>, |
| 146 | <0x10 0x0080>, <0x02 0x0100>, |
| 147 | <0x04 0x0100>, <0x08 0x0100>, |
| 148 | <0x10 0x0100>; |
| 149 | opp-hz = /bits/ 64 <640000000>; |
| 150 | }; |
| 151 | |
| 152 | opp-640000000-900 { |
| 153 | clock-latency-ns = <100000>; |
| 154 | opp-supported-hw = <0x01 0x0192>; |
| 155 | opp-hz = /bits/ 64 <640000000>; |
| 156 | }; |
| 157 | |
| 158 | opp-760000000-850 { |
| 159 | clock-latency-ns = <100000>; |
| 160 | opp-supported-hw = <0x1E 0x3461>, <0x08 0x0002>, |
| 161 | <0x08 0x0004>, <0x08 0x0008>, |
| 162 | <0x08 0x0010>, <0x08 0x0080>, |
| 163 | <0x10 0x0080>, <0x08 0x0100>, |
| 164 | <0x10 0x0100>, <0x01 0x0400>; |
| 165 | opp-hz = /bits/ 64 <760000000>; |
| 166 | }; |
| 167 | |
| 168 | opp-760000000-900 { |
| 169 | clock-latency-ns = <100000>; |
| 170 | opp-supported-hw = <0x01 0x0001>, <0x02 0x0002>, |
| 171 | <0x04 0x0002>, <0x02 0x0004>, |
| 172 | <0x04 0x0004>, <0x02 0x0008>, |
| 173 | <0x04 0x0008>, <0x02 0x0010>, |
| 174 | <0x04 0x0010>, <0x02 0x0080>, |
| 175 | <0x04 0x0080>, <0x02 0x0100>, |
| 176 | <0x04 0x0100>; |
| 177 | opp-hz = /bits/ 64 <760000000>; |
| 178 | }; |
| 179 | |
| 180 | opp-760000000-912 { |
| 181 | clock-latency-ns = <100000>; |
| 182 | opp-supported-hw = <0x1F 0x0200>; |
| 183 | opp-hz = /bits/ 64 <760000000>; |
| 184 | }; |
| 185 | |
| 186 | opp-760000000-975 { |
| 187 | clock-latency-ns = <100000>; |
| 188 | opp-supported-hw = <0x01 0x0192>; |
| 189 | opp-hz = /bits/ 64 <760000000>; |
| 190 | }; |
| 191 | |
| 192 | opp-816000000-850 { |
| 193 | clock-latency-ns = <100000>; |
| 194 | opp-supported-hw = <0x1F 0x0400>; |
| 195 | opp-hz = /bits/ 64 <816000000>; |
| 196 | }; |
| 197 | |
| 198 | opp-816000000-912 { |
| 199 | clock-latency-ns = <100000>; |
| 200 | opp-supported-hw = <0x1F 0x0200>; |
| 201 | opp-hz = /bits/ 64 <816000000>; |
| 202 | }; |
| 203 | |
| 204 | opp-860000000-850 { |
| 205 | clock-latency-ns = <100000>; |
| 206 | opp-supported-hw = <0x0C 0x0001>; |
| 207 | opp-hz = /bits/ 64 <860000000>; |
| 208 | }; |
| 209 | |
| 210 | opp-860000000-900 { |
| 211 | clock-latency-ns = <100000>; |
| 212 | opp-supported-hw = <0x02 0x0001>, <0x04 0x0002>, |
| 213 | <0x08 0x0002>, <0x04 0x0004>, |
| 214 | <0x08 0x0004>, <0x04 0x0008>, |
| 215 | <0x08 0x0008>, <0x04 0x0010>, |
| 216 | <0x08 0x0010>, <0x04 0x0080>, |
| 217 | <0x08 0x0080>, <0x10 0x0080>, |
| 218 | <0x04 0x0100>, <0x08 0x0100>, |
| 219 | <0x10 0x0100>; |
| 220 | opp-hz = /bits/ 64 <860000000>; |
| 221 | }; |
| 222 | |
| 223 | opp-860000000-975 { |
| 224 | clock-latency-ns = <100000>; |
| 225 | opp-supported-hw = <0x01 0x0001>, <0x02 0x0002>, |
| 226 | <0x02 0x0004>, <0x02 0x0008>, |
| 227 | <0x02 0x0010>, <0x02 0x0080>, |
| 228 | <0x02 0x0100>; |
| 229 | opp-hz = /bits/ 64 <860000000>; |
| 230 | }; |
| 231 | |
| 232 | opp-860000000-1000 { |
| 233 | clock-latency-ns = <100000>; |
| 234 | opp-supported-hw = <0x01 0x0192>; |
| 235 | opp-hz = /bits/ 64 <860000000>; |
| 236 | }; |
| 237 | |
| 238 | opp-910000000-900 { |
| 239 | clock-latency-ns = <100000>; |
| 240 | opp-supported-hw = <0x18 0x3060>; |
| 241 | opp-hz = /bits/ 64 <910000000>; |
| 242 | }; |
| 243 | |
| 244 | opp-1000000000-900 { |
| 245 | clock-latency-ns = <100000>; |
| 246 | opp-supported-hw = <0x0C 0x0001>; |
| 247 | opp-hz = /bits/ 64 <1000000000>; |
| 248 | }; |
| 249 | |
| 250 | opp-1000000000-975 { |
| 251 | clock-latency-ns = <100000>; |
| 252 | opp-supported-hw = <0x03 0x0001>, <0x04 0x0002>, |
| 253 | <0x08 0x0002>, <0x04 0x0004>, |
| 254 | <0x08 0x0004>, <0x04 0x0008>, |
| 255 | <0x08 0x0008>, <0x04 0x0010>, |
| 256 | <0x08 0x0010>, <0x04 0x0080>, |
| 257 | <0x08 0x0080>, <0x10 0x0080>, |
| 258 | <0x04 0x0100>, <0x08 0x0100>, |
| 259 | <0x10 0x0100>; |
| 260 | opp-hz = /bits/ 64 <1000000000>; |
| 261 | }; |
| 262 | |
| 263 | opp-1000000000-1000 { |
| 264 | clock-latency-ns = <100000>; |
| 265 | opp-supported-hw = <0x02 0x019E>; |
| 266 | opp-hz = /bits/ 64 <1000000000>; |
| 267 | }; |
| 268 | |
| 269 | opp-1000000000-1025 { |
| 270 | clock-latency-ns = <100000>; |
| 271 | opp-supported-hw = <0x01 0x0192>; |
| 272 | opp-hz = /bits/ 64 <1000000000>; |
| 273 | }; |
| 274 | |
| 275 | opp-1100000000-900 { |
| 276 | clock-latency-ns = <100000>; |
| 277 | opp-supported-hw = <0x08 0x0001>; |
| 278 | opp-hz = /bits/ 64 <1100000000>; |
| 279 | }; |
| 280 | |
| 281 | opp-1100000000-975 { |
| 282 | clock-latency-ns = <100000>; |
| 283 | opp-supported-hw = <0x06 0x0001>, <0x08 0x0002>, |
| 284 | <0x08 0x0004>, <0x08 0x0008>, |
| 285 | <0x08 0x0010>, <0x08 0x0080>, |
| 286 | <0x10 0x0080>, <0x08 0x0100>, |
| 287 | <0x10 0x0100>; |
| 288 | opp-hz = /bits/ 64 <1100000000>; |
| 289 | }; |
| 290 | |
| 291 | opp-1100000000-1000 { |
| 292 | clock-latency-ns = <100000>; |
| 293 | opp-supported-hw = <0x01 0x0001>, <0x04 0x0002>, |
| 294 | <0x04 0x0004>, <0x04 0x0008>, |
| 295 | <0x04 0x0010>, <0x04 0x0080>, |
| 296 | <0x04 0x0100>; |
| 297 | opp-hz = /bits/ 64 <1100000000>; |
| 298 | }; |
| 299 | |
| 300 | opp-1100000000-1025 { |
| 301 | clock-latency-ns = <100000>; |
| 302 | opp-supported-hw = <0x02 0x019E>; |
| 303 | opp-hz = /bits/ 64 <1100000000>; |
| 304 | }; |
| 305 | |
| 306 | opp-1100000000-1075 { |
| 307 | clock-latency-ns = <100000>; |
| 308 | opp-supported-hw = <0x01 0x0192>; |
| 309 | opp-hz = /bits/ 64 <1100000000>; |
| 310 | }; |
| 311 | |
| 312 | opp-1150000000-975 { |
| 313 | clock-latency-ns = <100000>; |
| 314 | opp-supported-hw = <0x18 0x3060>; |
| 315 | opp-hz = /bits/ 64 <1150000000>; |
| 316 | }; |
| 317 | |
| 318 | opp-1200000000-975 { |
| 319 | clock-latency-ns = <100000>; |
| 320 | opp-supported-hw = <0x08 0x0001>; |
| 321 | opp-hz = /bits/ 64 <1200000000>; |
| 322 | }; |
| 323 | |
| 324 | opp-1200000000-1000 { |
| 325 | clock-latency-ns = <100000>; |
| 326 | opp-supported-hw = <0x04 0x0001>, <0x08 0x0002>, |
| 327 | <0x08 0x0004>, <0x08 0x0008>, |
| 328 | <0x08 0x0010>, <0x08 0x0080>, |
| 329 | <0x10 0x0080>, <0x08 0x0100>, |
| 330 | <0x10 0x0100>; |
| 331 | opp-hz = /bits/ 64 <1200000000>; |
| 332 | }; |
| 333 | |
| 334 | opp-1200000000-1025 { |
| 335 | clock-latency-ns = <100000>; |
| 336 | opp-supported-hw = <0x02 0x0001>, <0x04 0x0002>, |
| 337 | <0x04 0x0004>, <0x04 0x0008>, |
| 338 | <0x04 0x0010>, <0x04 0x0080>, |
| 339 | <0x04 0x0100>; |
| 340 | opp-hz = /bits/ 64 <1200000000>; |
| 341 | }; |
| 342 | |
| 343 | opp-1200000000-1050 { |
| 344 | clock-latency-ns = <100000>; |
| 345 | opp-supported-hw = <0x02 0x019E>; |
| 346 | opp-hz = /bits/ 64 <1200000000>; |
| 347 | }; |
| 348 | |
| 349 | opp-1200000000-1075 { |
| 350 | clock-latency-ns = <100000>; |
| 351 | opp-supported-hw = <0x01 0x0001>; |
| 352 | opp-hz = /bits/ 64 <1200000000>; |
| 353 | }; |
| 354 | |
| 355 | opp-1200000000-1100 { |
| 356 | clock-latency-ns = <100000>; |
| 357 | opp-supported-hw = <0x01 0x0192>; |
| 358 | opp-hz = /bits/ 64 <1200000000>; |
| 359 | }; |
| 360 | |
| 361 | opp-1300000000-1000 { |
| 362 | clock-latency-ns = <100000>; |
| 363 | opp-supported-hw = <0x08 0x0001>, <0x10 0x0080>, |
| 364 | <0x10 0x0100>; |
| 365 | opp-hz = /bits/ 64 <1300000000>; |
| 366 | }; |
| 367 | |
| 368 | opp-1300000000-1025 { |
| 369 | clock-latency-ns = <100000>; |
| 370 | opp-supported-hw = <0x04 0x0001>, <0x08 0x0002>, |
| 371 | <0x08 0x0080>, <0x08 0x0100>; |
| 372 | opp-hz = /bits/ 64 <1300000000>; |
| 373 | }; |
| 374 | |
| 375 | opp-1300000000-1050 { |
| 376 | clock-latency-ns = <100000>; |
| 377 | opp-supported-hw = <0x12 0x3061>, <0x04 0x0002>, |
| 378 | <0x08 0x0004>, <0x08 0x0008>, |
| 379 | <0x08 0x0010>, <0x08 0x0020>, |
| 380 | <0x08 0x0040>, <0x04 0x0080>, |
| 381 | <0x04 0x0100>, <0x08 0x1000>, |
| 382 | <0x08 0x2000>; |
| 383 | opp-hz = /bits/ 64 <1300000000>; |
| 384 | }; |
| 385 | |
| 386 | opp-1300000000-1075 { |
| 387 | clock-latency-ns = <100000>; |
| 388 | opp-supported-hw = <0x02 0x0182>, <0x04 0x0004>, |
| 389 | <0x04 0x0008>, <0x04 0x0010>; |
| 390 | opp-hz = /bits/ 64 <1300000000>; |
| 391 | }; |
| 392 | |
| 393 | opp-1300000000-1100 { |
| 394 | clock-latency-ns = <100000>; |
| 395 | opp-supported-hw = <0x02 0x001C>; |
| 396 | opp-hz = /bits/ 64 <1300000000>; |
| 397 | }; |
| 398 | |
| 399 | opp-1300000000-1125 { |
| 400 | clock-latency-ns = <100000>; |
| 401 | opp-supported-hw = <0x01 0x0001>; |
| 402 | opp-hz = /bits/ 64 <1300000000>; |
| 403 | }; |
| 404 | |
| 405 | opp-1300000000-1150 { |
| 406 | clock-latency-ns = <100000>; |
| 407 | opp-supported-hw = <0x01 0x0182>; |
| 408 | opp-hz = /bits/ 64 <1300000000>; |
| 409 | }; |
| 410 | |
| 411 | opp-1300000000-1175 { |
| 412 | clock-latency-ns = <100000>; |
| 413 | opp-supported-hw = <0x01 0x0010>; |
| 414 | opp-hz = /bits/ 64 <1300000000>; |
| 415 | }; |
| 416 | |
| 417 | opp-1400000000-1100 { |
| 418 | clock-latency-ns = <100000>; |
| 419 | opp-supported-hw = <0x18 0x307C>; |
| 420 | opp-hz = /bits/ 64 <1400000000>; |
| 421 | }; |
| 422 | |
| 423 | opp-1400000000-1125 { |
| 424 | clock-latency-ns = <100000>; |
| 425 | opp-supported-hw = <0x04 0x000C>; |
| 426 | opp-hz = /bits/ 64 <1400000000>; |
| 427 | }; |
| 428 | |
| 429 | opp-1400000000-1150 { |
| 430 | clock-latency-ns = <100000>; |
| 431 | opp-supported-hw = <0x02 0x000C>, <0x04 0x0010>; |
| 432 | opp-hz = /bits/ 64 <1400000000>; |
| 433 | }; |
| 434 | |
| 435 | opp-1400000000-1175 { |
| 436 | clock-latency-ns = <100000>; |
| 437 | opp-supported-hw = <0x02 0x0010>; |
| 438 | opp-hz = /bits/ 64 <1400000000>; |
| 439 | }; |
| 440 | |
| 441 | opp-1400000000-1237 { |
| 442 | clock-latency-ns = <100000>; |
| 443 | opp-supported-hw = <0x01 0x0010>; |
| 444 | opp-hz = /bits/ 64 <1400000000>; |
| 445 | }; |
| 446 | |
| 447 | opp-1500000000-1125 { |
| 448 | clock-latency-ns = <100000>; |
| 449 | opp-supported-hw = <0x08 0x0010>, <0x10 0x0020>, |
| 450 | <0x10 0x0040>, <0x10 0x1000>, |
| 451 | <0x10 0x2000>; |
| 452 | opp-hz = /bits/ 64 <1500000000>; |
| 453 | }; |
| 454 | |
| 455 | opp-1500000000-1150 { |
| 456 | clock-latency-ns = <100000>; |
| 457 | opp-supported-hw = <0x04 0x0010>, <0x08 0x0020>, |
| 458 | <0x08 0x0040>, <0x08 0x1000>, |
| 459 | <0x08 0x2000>; |
| 460 | opp-hz = /bits/ 64 <1500000000>; |
| 461 | }; |
| 462 | |
| 463 | opp-1500000000-1200 { |
| 464 | clock-latency-ns = <100000>; |
| 465 | opp-supported-hw = <0x02 0x0010>; |
| 466 | opp-hz = /bits/ 64 <1500000000>; |
| 467 | }; |
| 468 | |
| 469 | opp-1500000000-1237 { |
| 470 | clock-latency-ns = <100000>; |
| 471 | opp-supported-hw = <0x01 0x0010>; |
| 472 | opp-hz = /bits/ 64 <1500000000>; |
| 473 | }; |
| 474 | |
| 475 | opp-1600000000-1212 { |
| 476 | clock-latency-ns = <100000>; |
| 477 | opp-supported-hw = <0x10 0x3060>; |
| 478 | opp-hz = /bits/ 64 <1600000000>; |
| 479 | }; |
| 480 | |
| 481 | opp-1600000000-1237 { |
| 482 | clock-latency-ns = <100000>; |
| 483 | opp-supported-hw = <0x08 0x3060>; |
| 484 | opp-hz = /bits/ 64 <1600000000>; |
| 485 | }; |
| 486 | |
| 487 | opp-1700000000-1212 { |
| 488 | clock-latency-ns = <100000>; |
| 489 | opp-supported-hw = <0x10 0x3060>; |
| 490 | opp-hz = /bits/ 64 <1700000000>; |
| 491 | }; |
| 492 | |
| 493 | opp-1700000000-1237 { |
| 494 | clock-latency-ns = <100000>; |
| 495 | opp-supported-hw = <0x08 0x3060>; |
| 496 | opp-hz = /bits/ 64 <1700000000>; |
| 497 | }; |
| 498 | }; |
| 499 | }; |