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Simon Glassb37e8152014-06-02 22:04:55 -06001/*
2 * This header provides constants for OMAP pinctrl bindings.
3 *
4 * Copyright (C) 2009 Nokia
5 * Copyright (C) 2009-2010 Texas Instruments
Simon Glass9eda2c52015-06-30 16:03:02 -06006 *
7 * SPDX-License-Identifier: GPL-2.0
Simon Glassb37e8152014-06-02 22:04:55 -06008 */
9
10#ifndef _DT_BINDINGS_PINCTRL_OMAP_H
11#define _DT_BINDINGS_PINCTRL_OMAP_H
12
13/* 34xx mux mode options for each pin. See TRM for options */
14#define MUX_MODE0 0
15#define MUX_MODE1 1
16#define MUX_MODE2 2
17#define MUX_MODE3 3
18#define MUX_MODE4 4
19#define MUX_MODE5 5
20#define MUX_MODE6 6
21#define MUX_MODE7 7
22
23/* 24xx/34xx mux bit defines */
24#define PULL_ENA (1 << 3)
25#define PULL_UP (1 << 4)
26#define ALTELECTRICALSEL (1 << 5)
27
28/* 34xx specific mux bit defines */
29#define INPUT_EN (1 << 8)
30#define OFF_EN (1 << 9)
31#define OFFOUT_EN (1 << 10)
32#define OFFOUT_VAL (1 << 11)
33#define OFF_PULL_EN (1 << 12)
34#define OFF_PULL_UP (1 << 13)
35#define WAKEUP_EN (1 << 14)
36
37/* 44xx specific mux bit defines */
38#define WAKEUP_EVENT (1 << 15)
39
40/* Active pin states */
41#define PIN_OUTPUT 0
42#define PIN_OUTPUT_PULLUP (PIN_OUTPUT | PULL_ENA | PULL_UP)
43#define PIN_OUTPUT_PULLDOWN (PIN_OUTPUT | PULL_ENA)
44#define PIN_INPUT INPUT_EN
45#define PIN_INPUT_PULLUP (PULL_ENA | INPUT_EN | PULL_UP)
46#define PIN_INPUT_PULLDOWN (PULL_ENA | INPUT_EN)
47
48/* Off mode states */
49#define PIN_OFF_NONE 0
50#define PIN_OFF_OUTPUT_HIGH (OFF_EN | OFFOUT_EN | OFFOUT_VAL)
51#define PIN_OFF_OUTPUT_LOW (OFF_EN | OFFOUT_EN)
52#define PIN_OFF_INPUT_PULLUP (OFF_EN | OFF_PULL_EN | OFF_PULL_UP)
53#define PIN_OFF_INPUT_PULLDOWN (OFF_EN | OFF_PULL_EN)
54#define PIN_OFF_WAKEUPENABLE WAKEUP_EN
55
Lokesh Vutla5a954ba2016-05-16 11:24:28 +053056/*
57 * Macros to allow using the absolute physical address instead of the
58 * padconf registers instead of the offset from padconf base.
59 */
60#define OMAP_IOPAD_OFFSET(pa, offset) (((pa) & 0xffff) - (offset))
61
62#define OMAP2420_CORE_IOPAD(pa, val) OMAP_IOPAD_OFFSET((pa), 0x0030) (val)
63#define OMAP2430_CORE_IOPAD(pa, val) OMAP_IOPAD_OFFSET((pa), 0x2030) (val)
64#define OMAP3_CORE1_IOPAD(pa, val) OMAP_IOPAD_OFFSET((pa), 0x2030) (val)
65#define OMAP3430_CORE2_IOPAD(pa, val) OMAP_IOPAD_OFFSET((pa), 0x25d8) (val)
66#define OMAP3630_CORE2_IOPAD(pa, val) OMAP_IOPAD_OFFSET((pa), 0x25a0) (val)
67#define OMAP3_WKUP_IOPAD(pa, val) OMAP_IOPAD_OFFSET((pa), 0x2a00) (val)
68#define DM814X_IOPAD(pa, val) OMAP_IOPAD_OFFSET((pa), 0x0800) (val)
69#define DM816X_IOPAD(pa, val) OMAP_IOPAD_OFFSET((pa), 0x0800) (val)
70#define AM33XX_IOPAD(pa, val) OMAP_IOPAD_OFFSET((pa), 0x0800) (val)
71
72/*
73 * Macros to allow using the offset from the padconf physical address
74 * instead of the offset from padconf base.
75 */
76#define OMAP_PADCONF_OFFSET(offset, base_offset) ((offset) - (base_offset))
77
78#define OMAP4_IOPAD(offset, val) OMAP_PADCONF_OFFSET((offset), 0x0040) (val)
79#define OMAP5_IOPAD(offset, val) OMAP_PADCONF_OFFSET((offset), 0x0040) (val)
80
81/*
82 * Define some commonly used pins configured by the boards.
83 * Note that some boards use alternative pins, so check
84 * the schematics before using these.
85 */
86#define OMAP3_UART1_RX 0x152
87#define OMAP3_UART2_RX 0x14a
88#define OMAP3_UART3_RX 0x16e
89#define OMAP4_UART2_RX 0xdc
90#define OMAP4_UART3_RX 0x104
91#define OMAP4_UART4_RX 0x11c
92
Simon Glassb37e8152014-06-02 22:04:55 -060093#endif
94