blob: 2f7736d503742be63fe2841688cbfe0ff7af0606 [file] [log] [blame]
Fabio Estevama7b1dc92011-05-13 03:15:11 +00001/*
2 * Copyright (C) 2011 Freescale Semiconductor, Inc.
3 *
Fabio Estevam60a7ec22011-09-22 08:07:20 +00004 * Configuration settings for the MX53SMD Freescale board.
Fabio Estevama7b1dc92011-05-13 03:15:11 +00005 *
Wolfgang Denkbd8ec7e2013-10-07 13:07:26 +02006 * SPDX-License-Identifier: GPL-2.0+
Fabio Estevama7b1dc92011-05-13 03:15:11 +00007 */
8
9#ifndef __CONFIG_H
10#define __CONFIG_H
11
12#define CONFIG_MX53
13
Fabio Estevama7b1dc92011-05-13 03:15:11 +000014#define CONFIG_DISPLAY_CPUINFO
15#define CONFIG_DISPLAY_BOARDINFO
16
Fabio Estevam60a7ec22011-09-22 08:07:20 +000017#define CONFIG_MACH_TYPE MACH_TYPE_MX53_SMD
18
Fabio Estevama7b1dc92011-05-13 03:15:11 +000019#include <asm/arch/imx-regs.h>
20
21#define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
Fabio Estevama7b1dc92011-05-13 03:15:11 +000022#define CONFIG_SETUP_MEMORY_TAGS
23#define CONFIG_INITRD_TAG
Fabio Estevam5db5f412013-04-24 14:44:26 +000024#define CONFIG_REVISION_TAG
Fabio Estevama7b1dc92011-05-13 03:15:11 +000025
26/* Size of malloc() pool */
27#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 2 * 1024 * 1024)
28
29#define CONFIG_BOARD_EARLY_INIT_F
30#define CONFIG_MXC_GPIO
31
32#define CONFIG_MXC_UART
Stefano Babic1ca47d92011-11-22 15:22:39 +010033#define CONFIG_MXC_UART_BASE UART1_BASE
Fabio Estevama7b1dc92011-05-13 03:15:11 +000034
35/* I2C Configs */
36#define CONFIG_CMD_I2C
trem03997412013-09-21 18:13:36 +020037#define CONFIG_SYS_I2C
38#define CONFIG_SYS_I2C_MXC
39#define CONFIG_SYS_SPD_BUS_NUM 1 /* I2C2 */
Fabio Estevama7b1dc92011-05-13 03:15:11 +000040
41/* MMC Configs */
42#define CONFIG_FSL_ESDHC
43#define CONFIG_SYS_FSL_ESDHC_ADDR 0
44#define CONFIG_SYS_FSL_ESDHC_NUM 1
45
46#define CONFIG_MMC
47#define CONFIG_CMD_MMC
48#define CONFIG_GENERIC_MMC
49#define CONFIG_CMD_FAT
50#define CONFIG_DOS_PARTITION
51
52/* Eth Configs */
53#define CONFIG_HAS_ETH1
Fabio Estevama7b1dc92011-05-13 03:15:11 +000054#define CONFIG_MII
Fabio Estevama7b1dc92011-05-13 03:15:11 +000055
56#define CONFIG_FEC_MXC
57#define IMX_FEC_BASE FEC_BASE_ADDR
58#define CONFIG_FEC_MXC_PHYADDR 0x1F
59
60#define CONFIG_CMD_PING
61#define CONFIG_CMD_DHCP
62#define CONFIG_CMD_MII
63#define CONFIG_CMD_NET
64
65/* allow to overwrite serial and ethaddr */
66#define CONFIG_ENV_OVERWRITE
67#define CONFIG_CONS_INDEX 1
68#define CONFIG_BAUDRATE 115200
Fabio Estevama7b1dc92011-05-13 03:15:11 +000069
70/* Command definition */
71#include <config_cmd_default.h>
72
73#undef CONFIG_CMD_IMLS
74
75#define CONFIG_BOOTDELAY 3
76
Wolfgang Grandegger96529e22011-10-17 08:21:56 +000077#define CONFIG_ETHPRIME "FEC0"
Fabio Estevama7b1dc92011-05-13 03:15:11 +000078
79#define CONFIG_LOADADDR 0x70800000 /* loadaddr env var */
80#define CONFIG_SYS_TEXT_BASE 0x77800000
81
82#define CONFIG_EXTRA_ENV_SETTINGS \
83 "script=boot.scr\0" \
84 "uimage=uImage\0" \
85 "mmcdev=0\0" \
86 "mmcpart=2\0" \
87 "mmcroot=/dev/mmcblk0p3 rw\0" \
88 "mmcrootfstype=ext3 rootwait\0" \
89 "mmcargs=setenv bootargs console=ttymxc0,${baudrate} " \
90 "root=${mmcroot} " \
91 "rootfstype=${mmcrootfstype}\0" \
92 "loadbootscript=" \
93 "fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \
94 "bootscript=echo Running bootscript from mmc ...; " \
95 "source\0" \
96 "loaduimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${uimage}\0" \
97 "mmcboot=echo Booting from mmc ...; " \
98 "run mmcargs; " \
99 "bootm\0" \
100 "netargs=setenv bootargs console=ttymxc0,${baudrate} " \
101 "root=/dev/nfs " \
102 "ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \
103 "netboot=echo Booting from net ...; " \
104 "run netargs; " \
105 "dhcp ${uimage}; bootm\0" \
106
107#define CONFIG_BOOTCOMMAND \
Andrew Bradforde1c7c8a2012-10-01 05:06:52 +0000108 "mmc dev ${mmcdev}; if mmc rescan; then " \
Fabio Estevama7b1dc92011-05-13 03:15:11 +0000109 "if run loadbootscript; then " \
110 "run bootscript; " \
111 "else " \
112 "if run loaduimage; then " \
113 "run mmcboot; " \
114 "else run netboot; " \
115 "fi; " \
116 "fi; " \
117 "else run netboot; fi"
118#define CONFIG_ARP_TIMEOUT 200UL
119
120/* Miscellaneous configurable options */
121#define CONFIG_SYS_LONGHELP /* undef to save memory */
122#define CONFIG_SYS_HUSH_PARSER /* use "hush" command parser */
Fabio Estevama7b1dc92011-05-13 03:15:11 +0000123#define CONFIG_SYS_PROMPT "MX53SMD U-Boot > "
124#define CONFIG_AUTO_COMPLETE
125#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
126
127/* Print Buffer Size */
128#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
129#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
130#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
131
132#define CONFIG_SYS_MEMTEST_START 0x70000000
Fabio Estevam4e499d62012-02-09 14:25:10 +0000133#define CONFIG_SYS_MEMTEST_END 0x70010000
Fabio Estevama7b1dc92011-05-13 03:15:11 +0000134
135#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
136
137#define CONFIG_SYS_HZ 1000
138#define CONFIG_CMDLINE_EDITING
139
Fabio Estevama7b1dc92011-05-13 03:15:11 +0000140/* Physical Memory Map */
141#define CONFIG_NR_DRAM_BANKS 2
142#define PHYS_SDRAM_1 CSD0_BASE_ADDR
143#define PHYS_SDRAM_1_SIZE (512 * 1024 * 1024)
144#define PHYS_SDRAM_2 CSD1_BASE_ADDR
145#define PHYS_SDRAM_2_SIZE (512 * 1024 * 1024)
146#define PHYS_SDRAM_SIZE (PHYS_SDRAM_1_SIZE + PHYS_SDRAM_2_SIZE)
147
148#define CONFIG_SYS_SDRAM_BASE (PHYS_SDRAM_1)
149#define CONFIG_SYS_INIT_RAM_ADDR (IRAM_BASE_ADDR)
150#define CONFIG_SYS_INIT_RAM_SIZE (IRAM_SIZE)
151
152#define CONFIG_SYS_INIT_SP_OFFSET \
153 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
154#define CONFIG_SYS_INIT_SP_ADDR \
155 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
156
157/* FLASH and environment organization */
158#define CONFIG_SYS_NO_FLASH
159
160#define CONFIG_ENV_OFFSET (6 * 64 * 1024)
161#define CONFIG_ENV_SIZE (8 * 1024)
162#define CONFIG_ENV_IS_IN_MMC
163#define CONFIG_SYS_MMC_ENV_DEV 0
164
165#define CONFIG_OF_LIBFDT
Fabio Estevama7b1dc92011-05-13 03:15:11 +0000166
167#endif /* __CONFIG_H */