Chris Packham | 5cd63ec | 2018-05-30 20:14:35 +1200 | [diff] [blame] | 1 | // SPDX-License-Identifier: GPL-2.0+ |
| 2 | /* |
| 3 | * (C) Copyright 2010, 2018 |
| 4 | * Allied Telesis <www.alliedtelesis.com> |
| 5 | */ |
| 6 | |
| 7 | #include <common.h> |
| 8 | #include <linux/io.h> |
| 9 | #include <miiphy.h> |
| 10 | #include <netdev.h> |
| 11 | #include <asm/arch/cpu.h> |
| 12 | #include <asm/arch/soc.h> |
| 13 | #include <asm/arch/mpp.h> |
| 14 | #include <asm/arch/gpio.h> |
| 15 | |
| 16 | /* Note: GPIO differences between specific boards |
| 17 | * |
| 18 | * We're trying to avoid having multiple build targets for all the Kirkwood |
| 19 | * based boards one area where things tend to differ is GPIO usage. For the |
| 20 | * most part the GPIOs driven by the bootloader are similar enough in function |
| 21 | * that there is no harm in driving them. |
| 22 | * |
| 23 | * XZ4 XS6 XS16 GS24A GT40 GP24A GT24A |
| 24 | * GPIO39 - INT(<) NC MUX_RST_N(>) NC POE_DIS_N(>) NC |
| 25 | */ |
| 26 | |
| 27 | #define SBX81LIFKW_OE_LOW ~(BIT(31) | BIT(30) | BIT(28) | BIT(27) | \ |
| 28 | BIT(18) | BIT(17) | BIT(13) | BIT(12) | \ |
| 29 | BIT(10)) |
| 30 | #define SBX81LIFKW_OE_HIGH ~(BIT(0) | BIT(1) | BIT(7)) |
| 31 | #define SBX81LIFKW_OE_VAL_LOW (BIT(31) | BIT(30) | BIT(28) | BIT(27)) |
| 32 | #define SBX81LIFKW_OE_VAL_HIGH (BIT(0) | BIT(1)) |
| 33 | |
| 34 | #define MV88E6097_RESET 27 |
| 35 | |
| 36 | DECLARE_GLOBAL_DATA_PTR; |
| 37 | |
| 38 | struct led { |
| 39 | u32 reg; |
| 40 | u32 value; |
| 41 | u32 mask; |
| 42 | }; |
| 43 | |
| 44 | struct led amber_solid = { |
| 45 | MVEBU_GPIO0_BASE, |
| 46 | BIT(10), |
| 47 | BIT(18) | BIT(10) |
| 48 | }; |
| 49 | |
| 50 | struct led green_solid = { |
| 51 | MVEBU_GPIO0_BASE, |
| 52 | BIT(18) | BIT(10), |
| 53 | BIT(18) | BIT(10) |
| 54 | }; |
| 55 | |
| 56 | struct led amber_flash = { |
| 57 | MVEBU_GPIO0_BASE, |
| 58 | 0, |
| 59 | BIT(18) | BIT(10) |
| 60 | }; |
| 61 | |
| 62 | struct led green_flash = { |
| 63 | MVEBU_GPIO0_BASE, |
| 64 | BIT(18), |
| 65 | BIT(18) | BIT(10) |
| 66 | }; |
| 67 | |
| 68 | static void status_led_set(struct led *led) |
| 69 | { |
| 70 | clrsetbits_le32(led->reg, led->mask, led->value); |
| 71 | } |
| 72 | |
| 73 | int board_early_init_f(void) |
| 74 | { |
| 75 | /* |
| 76 | * default gpio configuration |
| 77 | * There are maximum 64 gpios controlled through 2 sets of registers |
| 78 | * the below configuration configures mainly initial LED status |
| 79 | */ |
| 80 | mvebu_config_gpio(SBX81LIFKW_OE_VAL_LOW, |
| 81 | SBX81LIFKW_OE_VAL_HIGH, |
| 82 | SBX81LIFKW_OE_LOW, SBX81LIFKW_OE_HIGH); |
| 83 | |
| 84 | /* Multi-Purpose Pins Functionality configuration */ |
| 85 | static const u32 kwmpp_config[] = { |
| 86 | MPP0_SPI_SCn, |
| 87 | MPP1_SPI_MOSI, |
| 88 | MPP2_SPI_SCK, |
| 89 | MPP3_SPI_MISO, |
| 90 | MPP4_UART0_RXD, |
| 91 | MPP5_UART0_TXD, |
| 92 | MPP6_SYSRST_OUTn, |
| 93 | MPP7_PEX_RST_OUTn, |
| 94 | MPP8_TW_SDA, |
| 95 | MPP9_TW_SCK, |
| 96 | MPP10_GPO, |
| 97 | MPP11_GPIO, |
| 98 | MPP12_GPO, |
| 99 | MPP13_GPIO, |
| 100 | MPP14_GPIO, |
| 101 | MPP15_UART0_RTS, |
| 102 | MPP16_UART0_CTS, |
| 103 | MPP17_GPIO, |
| 104 | MPP18_GPO, |
| 105 | MPP19_GPO, |
| 106 | MPP20_GPIO, |
| 107 | MPP21_GPIO, |
| 108 | MPP22_GPIO, |
| 109 | MPP23_GPIO, |
| 110 | MPP24_GPIO, |
| 111 | MPP25_GPIO, |
| 112 | MPP26_GPIO, |
| 113 | MPP27_GPIO, |
| 114 | MPP28_GPIO, |
| 115 | MPP29_GPIO, |
| 116 | MPP30_GPIO, |
| 117 | MPP31_GPIO, |
| 118 | MPP32_GPIO, |
| 119 | MPP33_GPIO, |
| 120 | MPP34_GPIO, |
| 121 | MPP35_GPIO, |
| 122 | MPP36_GPIO, |
| 123 | MPP37_GPIO, |
| 124 | MPP38_GPIO, |
| 125 | MPP39_GPIO, |
| 126 | MPP40_GPIO, |
| 127 | MPP41_GPIO, |
| 128 | MPP42_GPIO, |
| 129 | MPP43_GPIO, |
| 130 | MPP44_GPIO, |
| 131 | MPP45_GPIO, |
| 132 | MPP46_GPIO, |
| 133 | MPP47_GPIO, |
| 134 | MPP48_GPIO, |
| 135 | MPP49_GPIO, |
| 136 | 0 |
| 137 | }; |
| 138 | |
| 139 | kirkwood_mpp_conf(kwmpp_config, NULL); |
| 140 | return 0; |
| 141 | } |
| 142 | |
| 143 | int board_init(void) |
| 144 | { |
| 145 | /* Power-down unused subsystems. The required |
| 146 | * subsystems are: |
| 147 | * |
| 148 | * GE0 b0 |
| 149 | * PEX0 PHY b1 |
| 150 | * PEX0.0 b2 |
| 151 | * TSU b5 |
| 152 | * SDRAM b6 |
| 153 | * RUNIT b7 |
| 154 | */ |
| 155 | writel((BIT(0) | BIT(1) | BIT(2) | |
| 156 | BIT(5) | BIT(6) | BIT(7)), |
| 157 | KW_CPU_REG_BASE + 0x1c); |
| 158 | |
| 159 | /* address of boot parameters */ |
| 160 | gd->bd->bi_boot_params = mvebu_sdram_bar(0) + 0x100; |
| 161 | |
| 162 | status_led_set(&amber_solid); |
| 163 | |
| 164 | return 0; |
| 165 | } |
| 166 | |
Chris Packham | 83bfe79 | 2018-06-03 16:21:27 +1200 | [diff] [blame] | 167 | #ifdef CONFIG_RESET_PHY_R |
| 168 | /* automatically defined by kirkwood config.h */ |
Chris Packham | 5cd63ec | 2018-05-30 20:14:35 +1200 | [diff] [blame] | 169 | void reset_phy(void) |
| 170 | { |
Chris Packham | 83bfe79 | 2018-06-03 16:21:27 +1200 | [diff] [blame] | 171 | } |
| 172 | #endif |
| 173 | |
| 174 | #ifdef CONFIG_MV88E61XX_SWITCH |
| 175 | int mv88e61xx_hw_reset(struct phy_device *phydev) |
| 176 | { |
Chris Packham | 5cd63ec | 2018-05-30 20:14:35 +1200 | [diff] [blame] | 177 | /* Ensure the 88e6097 gets at least 10ms Reset |
| 178 | */ |
| 179 | kw_gpio_set_value(MV88E6097_RESET, 0); |
| 180 | mdelay(20); |
| 181 | kw_gpio_set_value(MV88E6097_RESET, 1); |
| 182 | mdelay(20); |
Chris Packham | 83bfe79 | 2018-06-03 16:21:27 +1200 | [diff] [blame] | 183 | |
| 184 | phydev->advertising = ADVERTISED_10baseT_Half | ADVERTISED_10baseT_Full; |
| 185 | |
| 186 | return 0; |
Chris Packham | 5cd63ec | 2018-05-30 20:14:35 +1200 | [diff] [blame] | 187 | } |
| 188 | #endif |
| 189 | |
| 190 | #ifdef CONFIG_MISC_INIT_R |
| 191 | int misc_init_r(void) |
| 192 | { |
| 193 | status_led_set(&green_flash); |
| 194 | |
| 195 | return 0; |
| 196 | } |
| 197 | #endif |