Tom Rini | 10e4779 | 2018-05-06 17:58:06 -0400 | [diff] [blame] | 1 | // SPDX-License-Identifier: GPL-2.0+ |
Oliver Schinagl | d3a558d | 2013-07-26 12:56:58 +0200 | [diff] [blame] | 2 | /* |
Hans de Goede | 1dd334b | 2014-11-29 23:54:25 +0100 | [diff] [blame] | 3 | * AXP221 and AXP223 driver |
| 4 | * |
| 5 | * IMPORTANT when making changes to this file check that the registers |
| 6 | * used are the same for the axp221 and axp223. |
| 7 | * |
| 8 | * (C) Copyright 2014 Hans de Goede <hdegoede@redhat.com> |
Oliver Schinagl | d3a558d | 2013-07-26 12:56:58 +0200 | [diff] [blame] | 9 | * (C) Copyright 2013 Oliver Schinagl <oliver@schinagl.nl> |
Oliver Schinagl | d3a558d | 2013-07-26 12:56:58 +0200 | [diff] [blame] | 10 | */ |
| 11 | |
Tom Rini | abb9a04 | 2024-05-18 20:20:43 -0600 | [diff] [blame] | 12 | #include <common.h> |
Hans de Goede | 6391f0e | 2015-12-20 16:14:31 +0100 | [diff] [blame] | 13 | #include <command.h> |
Oliver Schinagl | d3a558d | 2013-07-26 12:56:58 +0200 | [diff] [blame] | 14 | #include <errno.h> |
Hans de Goede | bb930c3 | 2015-04-25 14:07:37 +0200 | [diff] [blame] | 15 | #include <asm/arch/pmic_bus.h> |
Hans de Goede | d9ee84b | 2015-10-03 15:18:33 +0200 | [diff] [blame] | 16 | #include <axp_pmic.h> |
Oliver Schinagl | d3a558d | 2013-07-26 12:56:58 +0200 | [diff] [blame] | 17 | |
| 18 | static u8 axp221_mvolt_to_cfg(int mvolt, int min, int max, int div) |
| 19 | { |
| 20 | if (mvolt < min) |
| 21 | mvolt = min; |
| 22 | else if (mvolt > max) |
| 23 | mvolt = max; |
| 24 | |
| 25 | return (mvolt - min) / div; |
| 26 | } |
| 27 | |
Hans de Goede | d9ee84b | 2015-10-03 15:18:33 +0200 | [diff] [blame] | 28 | int axp_set_dcdc1(unsigned int mvolt) |
Oliver Schinagl | d3a558d | 2013-07-26 12:56:58 +0200 | [diff] [blame] | 29 | { |
| 30 | int ret; |
| 31 | u8 cfg = axp221_mvolt_to_cfg(mvolt, 1600, 3400, 100); |
| 32 | |
Hans de Goede | be4929c | 2014-12-13 14:02:38 +0100 | [diff] [blame] | 33 | if (mvolt == 0) |
Hans de Goede | bb930c3 | 2015-04-25 14:07:37 +0200 | [diff] [blame] | 34 | return pmic_bus_clrbits(AXP221_OUTPUT_CTRL1, |
| 35 | AXP221_OUTPUT_CTRL1_DCDC1_EN); |
Hans de Goede | be4929c | 2014-12-13 14:02:38 +0100 | [diff] [blame] | 36 | |
Hans de Goede | 1dd334b | 2014-11-29 23:54:25 +0100 | [diff] [blame] | 37 | ret = pmic_bus_write(AXP221_DCDC1_CTRL, cfg); |
Oliver Schinagl | d3a558d | 2013-07-26 12:56:58 +0200 | [diff] [blame] | 38 | if (ret) |
| 39 | return ret; |
| 40 | |
Hans de Goede | bb930c3 | 2015-04-25 14:07:37 +0200 | [diff] [blame] | 41 | ret = pmic_bus_setbits(AXP221_OUTPUT_CTRL2, |
| 42 | AXP221_OUTPUT_CTRL2_DCDC1SW_EN); |
Hans de Goede | be4929c | 2014-12-13 14:02:38 +0100 | [diff] [blame] | 43 | if (ret) |
| 44 | return ret; |
| 45 | |
Hans de Goede | bb930c3 | 2015-04-25 14:07:37 +0200 | [diff] [blame] | 46 | return pmic_bus_setbits(AXP221_OUTPUT_CTRL1, |
| 47 | AXP221_OUTPUT_CTRL1_DCDC1_EN); |
Oliver Schinagl | d3a558d | 2013-07-26 12:56:58 +0200 | [diff] [blame] | 48 | } |
| 49 | |
Hans de Goede | d9ee84b | 2015-10-03 15:18:33 +0200 | [diff] [blame] | 50 | int axp_set_dcdc2(unsigned int mvolt) |
Oliver Schinagl | d3a558d | 2013-07-26 12:56:58 +0200 | [diff] [blame] | 51 | { |
Hans de Goede | be4929c | 2014-12-13 14:02:38 +0100 | [diff] [blame] | 52 | int ret; |
Oliver Schinagl | d3a558d | 2013-07-26 12:56:58 +0200 | [diff] [blame] | 53 | u8 cfg = axp221_mvolt_to_cfg(mvolt, 600, 1540, 20); |
| 54 | |
Hans de Goede | be4929c | 2014-12-13 14:02:38 +0100 | [diff] [blame] | 55 | if (mvolt == 0) |
Hans de Goede | bb930c3 | 2015-04-25 14:07:37 +0200 | [diff] [blame] | 56 | return pmic_bus_clrbits(AXP221_OUTPUT_CTRL1, |
| 57 | AXP221_OUTPUT_CTRL1_DCDC2_EN); |
Hans de Goede | be4929c | 2014-12-13 14:02:38 +0100 | [diff] [blame] | 58 | |
| 59 | ret = pmic_bus_write(AXP221_DCDC2_CTRL, cfg); |
| 60 | if (ret) |
| 61 | return ret; |
| 62 | |
Hans de Goede | bb930c3 | 2015-04-25 14:07:37 +0200 | [diff] [blame] | 63 | return pmic_bus_setbits(AXP221_OUTPUT_CTRL1, |
| 64 | AXP221_OUTPUT_CTRL1_DCDC2_EN); |
Oliver Schinagl | d3a558d | 2013-07-26 12:56:58 +0200 | [diff] [blame] | 65 | } |
| 66 | |
Hans de Goede | d9ee84b | 2015-10-03 15:18:33 +0200 | [diff] [blame] | 67 | int axp_set_dcdc3(unsigned int mvolt) |
Oliver Schinagl | d3a558d | 2013-07-26 12:56:58 +0200 | [diff] [blame] | 68 | { |
Hans de Goede | be4929c | 2014-12-13 14:02:38 +0100 | [diff] [blame] | 69 | int ret; |
Oliver Schinagl | d3a558d | 2013-07-26 12:56:58 +0200 | [diff] [blame] | 70 | u8 cfg = axp221_mvolt_to_cfg(mvolt, 600, 1860, 20); |
| 71 | |
Hans de Goede | be4929c | 2014-12-13 14:02:38 +0100 | [diff] [blame] | 72 | if (mvolt == 0) |
Hans de Goede | bb930c3 | 2015-04-25 14:07:37 +0200 | [diff] [blame] | 73 | return pmic_bus_clrbits(AXP221_OUTPUT_CTRL1, |
| 74 | AXP221_OUTPUT_CTRL1_DCDC3_EN); |
Hans de Goede | be4929c | 2014-12-13 14:02:38 +0100 | [diff] [blame] | 75 | |
| 76 | ret = pmic_bus_write(AXP221_DCDC3_CTRL, cfg); |
| 77 | if (ret) |
| 78 | return ret; |
| 79 | |
Hans de Goede | bb930c3 | 2015-04-25 14:07:37 +0200 | [diff] [blame] | 80 | return pmic_bus_setbits(AXP221_OUTPUT_CTRL1, |
| 81 | AXP221_OUTPUT_CTRL1_DCDC3_EN); |
Oliver Schinagl | d3a558d | 2013-07-26 12:56:58 +0200 | [diff] [blame] | 82 | } |
| 83 | |
Hans de Goede | d9ee84b | 2015-10-03 15:18:33 +0200 | [diff] [blame] | 84 | int axp_set_dcdc4(unsigned int mvolt) |
Oliver Schinagl | d3a558d | 2013-07-26 12:56:58 +0200 | [diff] [blame] | 85 | { |
Hans de Goede | be4929c | 2014-12-13 14:02:38 +0100 | [diff] [blame] | 86 | int ret; |
Oliver Schinagl | d3a558d | 2013-07-26 12:56:58 +0200 | [diff] [blame] | 87 | u8 cfg = axp221_mvolt_to_cfg(mvolt, 600, 1540, 20); |
| 88 | |
Hans de Goede | be4929c | 2014-12-13 14:02:38 +0100 | [diff] [blame] | 89 | if (mvolt == 0) |
Hans de Goede | bb930c3 | 2015-04-25 14:07:37 +0200 | [diff] [blame] | 90 | return pmic_bus_clrbits(AXP221_OUTPUT_CTRL1, |
| 91 | AXP221_OUTPUT_CTRL1_DCDC4_EN); |
Hans de Goede | be4929c | 2014-12-13 14:02:38 +0100 | [diff] [blame] | 92 | |
| 93 | ret = pmic_bus_write(AXP221_DCDC4_CTRL, cfg); |
| 94 | if (ret) |
| 95 | return ret; |
| 96 | |
Hans de Goede | bb930c3 | 2015-04-25 14:07:37 +0200 | [diff] [blame] | 97 | return pmic_bus_setbits(AXP221_OUTPUT_CTRL1, |
| 98 | AXP221_OUTPUT_CTRL1_DCDC4_EN); |
Oliver Schinagl | d3a558d | 2013-07-26 12:56:58 +0200 | [diff] [blame] | 99 | } |
| 100 | |
Hans de Goede | d9ee84b | 2015-10-03 15:18:33 +0200 | [diff] [blame] | 101 | int axp_set_dcdc5(unsigned int mvolt) |
Oliver Schinagl | d3a558d | 2013-07-26 12:56:58 +0200 | [diff] [blame] | 102 | { |
Hans de Goede | be4929c | 2014-12-13 14:02:38 +0100 | [diff] [blame] | 103 | int ret; |
Oliver Schinagl | d3a558d | 2013-07-26 12:56:58 +0200 | [diff] [blame] | 104 | u8 cfg = axp221_mvolt_to_cfg(mvolt, 1000, 2550, 50); |
| 105 | |
Hans de Goede | be4929c | 2014-12-13 14:02:38 +0100 | [diff] [blame] | 106 | if (mvolt == 0) |
Hans de Goede | bb930c3 | 2015-04-25 14:07:37 +0200 | [diff] [blame] | 107 | return pmic_bus_clrbits(AXP221_OUTPUT_CTRL1, |
| 108 | AXP221_OUTPUT_CTRL1_DCDC5_EN); |
Hans de Goede | be4929c | 2014-12-13 14:02:38 +0100 | [diff] [blame] | 109 | |
| 110 | ret = pmic_bus_write(AXP221_DCDC5_CTRL, cfg); |
| 111 | if (ret) |
| 112 | return ret; |
| 113 | |
Hans de Goede | bb930c3 | 2015-04-25 14:07:37 +0200 | [diff] [blame] | 114 | return pmic_bus_setbits(AXP221_OUTPUT_CTRL1, |
| 115 | AXP221_OUTPUT_CTRL1_DCDC5_EN); |
Oliver Schinagl | d3a558d | 2013-07-26 12:56:58 +0200 | [diff] [blame] | 116 | } |
| 117 | |
Hans de Goede | d9ee84b | 2015-10-03 15:18:33 +0200 | [diff] [blame] | 118 | int axp_set_aldo1(unsigned int mvolt) |
Oliver Schinagl | d3a558d | 2013-07-26 12:56:58 +0200 | [diff] [blame] | 119 | { |
| 120 | int ret; |
| 121 | u8 cfg = axp221_mvolt_to_cfg(mvolt, 700, 3300, 100); |
| 122 | |
Hans de Goede | be4929c | 2014-12-13 14:02:38 +0100 | [diff] [blame] | 123 | if (mvolt == 0) |
Hans de Goede | bb930c3 | 2015-04-25 14:07:37 +0200 | [diff] [blame] | 124 | return pmic_bus_clrbits(AXP221_OUTPUT_CTRL1, |
| 125 | AXP221_OUTPUT_CTRL1_ALDO1_EN); |
Hans de Goede | be4929c | 2014-12-13 14:02:38 +0100 | [diff] [blame] | 126 | |
Hans de Goede | 1dd334b | 2014-11-29 23:54:25 +0100 | [diff] [blame] | 127 | ret = pmic_bus_write(AXP221_ALDO1_CTRL, cfg); |
Oliver Schinagl | d3a558d | 2013-07-26 12:56:58 +0200 | [diff] [blame] | 128 | if (ret) |
| 129 | return ret; |
| 130 | |
Hans de Goede | bb930c3 | 2015-04-25 14:07:37 +0200 | [diff] [blame] | 131 | return pmic_bus_setbits(AXP221_OUTPUT_CTRL1, |
| 132 | AXP221_OUTPUT_CTRL1_ALDO1_EN); |
Oliver Schinagl | d3a558d | 2013-07-26 12:56:58 +0200 | [diff] [blame] | 133 | } |
| 134 | |
Hans de Goede | d9ee84b | 2015-10-03 15:18:33 +0200 | [diff] [blame] | 135 | int axp_set_aldo2(unsigned int mvolt) |
Oliver Schinagl | d3a558d | 2013-07-26 12:56:58 +0200 | [diff] [blame] | 136 | { |
| 137 | int ret; |
| 138 | u8 cfg = axp221_mvolt_to_cfg(mvolt, 700, 3300, 100); |
| 139 | |
Hans de Goede | be4929c | 2014-12-13 14:02:38 +0100 | [diff] [blame] | 140 | if (mvolt == 0) |
Hans de Goede | bb930c3 | 2015-04-25 14:07:37 +0200 | [diff] [blame] | 141 | return pmic_bus_clrbits(AXP221_OUTPUT_CTRL1, |
| 142 | AXP221_OUTPUT_CTRL1_ALDO2_EN); |
Hans de Goede | be4929c | 2014-12-13 14:02:38 +0100 | [diff] [blame] | 143 | |
Hans de Goede | 1dd334b | 2014-11-29 23:54:25 +0100 | [diff] [blame] | 144 | ret = pmic_bus_write(AXP221_ALDO2_CTRL, cfg); |
Oliver Schinagl | d3a558d | 2013-07-26 12:56:58 +0200 | [diff] [blame] | 145 | if (ret) |
| 146 | return ret; |
| 147 | |
Hans de Goede | bb930c3 | 2015-04-25 14:07:37 +0200 | [diff] [blame] | 148 | return pmic_bus_setbits(AXP221_OUTPUT_CTRL1, |
| 149 | AXP221_OUTPUT_CTRL1_ALDO2_EN); |
Oliver Schinagl | d3a558d | 2013-07-26 12:56:58 +0200 | [diff] [blame] | 150 | } |
| 151 | |
Hans de Goede | d9ee84b | 2015-10-03 15:18:33 +0200 | [diff] [blame] | 152 | int axp_set_aldo3(unsigned int mvolt) |
Oliver Schinagl | d3a558d | 2013-07-26 12:56:58 +0200 | [diff] [blame] | 153 | { |
| 154 | int ret; |
| 155 | u8 cfg = axp221_mvolt_to_cfg(mvolt, 700, 3300, 100); |
| 156 | |
Hans de Goede | be4929c | 2014-12-13 14:02:38 +0100 | [diff] [blame] | 157 | if (mvolt == 0) |
Hans de Goede | bb930c3 | 2015-04-25 14:07:37 +0200 | [diff] [blame] | 158 | return pmic_bus_clrbits(AXP221_OUTPUT_CTRL3, |
| 159 | AXP221_OUTPUT_CTRL3_ALDO3_EN); |
Hans de Goede | be4929c | 2014-12-13 14:02:38 +0100 | [diff] [blame] | 160 | |
Hans de Goede | 1dd334b | 2014-11-29 23:54:25 +0100 | [diff] [blame] | 161 | ret = pmic_bus_write(AXP221_ALDO3_CTRL, cfg); |
Oliver Schinagl | d3a558d | 2013-07-26 12:56:58 +0200 | [diff] [blame] | 162 | if (ret) |
| 163 | return ret; |
| 164 | |
Hans de Goede | bb930c3 | 2015-04-25 14:07:37 +0200 | [diff] [blame] | 165 | return pmic_bus_setbits(AXP221_OUTPUT_CTRL3, |
| 166 | AXP221_OUTPUT_CTRL3_ALDO3_EN); |
Oliver Schinagl | d3a558d | 2013-07-26 12:56:58 +0200 | [diff] [blame] | 167 | } |
| 168 | |
Chen-Yu Tsai | 2e6911f | 2016-01-12 14:42:37 +0800 | [diff] [blame] | 169 | int axp_set_dldo(int dldo_num, unsigned int mvolt) |
| 170 | { |
| 171 | u8 cfg = axp221_mvolt_to_cfg(mvolt, 700, 3300, 100); |
| 172 | int ret; |
| 173 | |
| 174 | if (dldo_num < 1 || dldo_num > 4) |
| 175 | return -EINVAL; |
| 176 | |
| 177 | if (mvolt == 0) |
| 178 | return pmic_bus_clrbits(AXP221_OUTPUT_CTRL2, |
| 179 | AXP221_OUTPUT_CTRL2_DLDO1_EN << (dldo_num - 1)); |
| 180 | |
| 181 | ret = pmic_bus_write(AXP221_DLDO1_CTRL + (dldo_num - 1), cfg); |
| 182 | if (ret) |
| 183 | return ret; |
| 184 | |
| 185 | return pmic_bus_setbits(AXP221_OUTPUT_CTRL2, |
| 186 | AXP221_OUTPUT_CTRL2_DLDO1_EN << (dldo_num - 1)); |
| 187 | } |
| 188 | |
Hans de Goede | d9ee84b | 2015-10-03 15:18:33 +0200 | [diff] [blame] | 189 | int axp_set_eldo(int eldo_num, unsigned int mvolt) |
Siarhei Siamashka | 7e4eb6c | 2015-01-19 05:23:30 +0200 | [diff] [blame] | 190 | { |
| 191 | int ret; |
| 192 | u8 cfg = axp221_mvolt_to_cfg(mvolt, 700, 3300, 100); |
Siarhei Siamashka | 7e4eb6c | 2015-01-19 05:23:30 +0200 | [diff] [blame] | 193 | |
Chen-Yu Tsai | c80376c | 2016-05-02 10:28:10 +0800 | [diff] [blame] | 194 | if (eldo_num < 1 || eldo_num > 3) |
Siarhei Siamashka | 7e4eb6c | 2015-01-19 05:23:30 +0200 | [diff] [blame] | 195 | return -EINVAL; |
Siarhei Siamashka | 7e4eb6c | 2015-01-19 05:23:30 +0200 | [diff] [blame] | 196 | |
| 197 | if (mvolt == 0) |
Chen-Yu Tsai | c80376c | 2016-05-02 10:28:10 +0800 | [diff] [blame] | 198 | return pmic_bus_clrbits(AXP221_OUTPUT_CTRL2, |
| 199 | AXP221_OUTPUT_CTRL2_ELDO1_EN << (eldo_num - 1)); |
Siarhei Siamashka | 7e4eb6c | 2015-01-19 05:23:30 +0200 | [diff] [blame] | 200 | |
Chen-Yu Tsai | c80376c | 2016-05-02 10:28:10 +0800 | [diff] [blame] | 201 | ret = pmic_bus_write(AXP221_ELDO1_CTRL + (eldo_num - 1), cfg); |
Siarhei Siamashka | 7e4eb6c | 2015-01-19 05:23:30 +0200 | [diff] [blame] | 202 | if (ret) |
| 203 | return ret; |
| 204 | |
Chen-Yu Tsai | c80376c | 2016-05-02 10:28:10 +0800 | [diff] [blame] | 205 | return pmic_bus_setbits(AXP221_OUTPUT_CTRL2, |
| 206 | AXP221_OUTPUT_CTRL2_ELDO1_EN << (eldo_num - 1)); |
Siarhei Siamashka | 7e4eb6c | 2015-01-19 05:23:30 +0200 | [diff] [blame] | 207 | } |
| 208 | |
Hans de Goede | d9ee84b | 2015-10-03 15:18:33 +0200 | [diff] [blame] | 209 | int axp_init(void) |
Oliver Schinagl | d3a558d | 2013-07-26 12:56:58 +0200 | [diff] [blame] | 210 | { |
| 211 | u8 axp_chip_id; |
| 212 | int ret; |
| 213 | |
Hans de Goede | 1dd334b | 2014-11-29 23:54:25 +0100 | [diff] [blame] | 214 | ret = pmic_bus_init(); |
Oliver Schinagl | d3a558d | 2013-07-26 12:56:58 +0200 | [diff] [blame] | 215 | if (ret) |
| 216 | return ret; |
| 217 | |
Hans de Goede | 1dd334b | 2014-11-29 23:54:25 +0100 | [diff] [blame] | 218 | ret = pmic_bus_read(AXP221_CHIP_ID, &axp_chip_id); |
Oliver Schinagl | d3a558d | 2013-07-26 12:56:58 +0200 | [diff] [blame] | 219 | if (ret) |
| 220 | return ret; |
| 221 | |
| 222 | if (!(axp_chip_id == 0x6 || axp_chip_id == 0x7 || axp_chip_id == 0x17)) |
| 223 | return -ENODEV; |
| 224 | |
Hans de Goede | af7f67c | 2016-09-12 09:52:52 +0200 | [diff] [blame] | 225 | /* |
| 226 | * Turn off LDOIO regulators / tri-state GPIO pins, when rebooting |
| 227 | * from android these are sometimes on. |
| 228 | */ |
| 229 | ret = pmic_bus_write(AXP_GPIO0_CTRL, AXP_GPIO_CTRL_INPUT); |
| 230 | if (ret) |
| 231 | return ret; |
| 232 | |
| 233 | ret = pmic_bus_write(AXP_GPIO1_CTRL, AXP_GPIO_CTRL_INPUT); |
| 234 | if (ret) |
| 235 | return ret; |
| 236 | |
Oliver Schinagl | d3a558d | 2013-07-26 12:56:58 +0200 | [diff] [blame] | 237 | return 0; |
| 238 | } |
Hans de Goede | 65142e9 | 2014-11-25 16:37:52 +0100 | [diff] [blame] | 239 | |
Hans de Goede | d9ee84b | 2015-10-03 15:18:33 +0200 | [diff] [blame] | 240 | int axp_get_sid(unsigned int *sid) |
Hans de Goede | 65142e9 | 2014-11-25 16:37:52 +0100 | [diff] [blame] | 241 | { |
| 242 | u8 *dest = (u8 *)sid; |
| 243 | int i, ret; |
| 244 | |
Hans de Goede | d9ee84b | 2015-10-03 15:18:33 +0200 | [diff] [blame] | 245 | ret = pmic_bus_init(); |
Hans de Goede | 65142e9 | 2014-11-25 16:37:52 +0100 | [diff] [blame] | 246 | if (ret) |
| 247 | return ret; |
| 248 | |
Hans de Goede | 1dd334b | 2014-11-29 23:54:25 +0100 | [diff] [blame] | 249 | ret = pmic_bus_write(AXP221_PAGE, 1); |
Hans de Goede | 65142e9 | 2014-11-25 16:37:52 +0100 | [diff] [blame] | 250 | if (ret) |
| 251 | return ret; |
| 252 | |
| 253 | for (i = 0; i < 16; i++) { |
Hans de Goede | 1dd334b | 2014-11-29 23:54:25 +0100 | [diff] [blame] | 254 | ret = pmic_bus_read(AXP221_SID + i, &dest[i]); |
Hans de Goede | 65142e9 | 2014-11-25 16:37:52 +0100 | [diff] [blame] | 255 | if (ret) |
| 256 | return ret; |
| 257 | } |
| 258 | |
Hans de Goede | 1dd334b | 2014-11-29 23:54:25 +0100 | [diff] [blame] | 259 | pmic_bus_write(AXP221_PAGE, 0); |
Hans de Goede | 65142e9 | 2014-11-25 16:37:52 +0100 | [diff] [blame] | 260 | |
| 261 | for (i = 0; i < 4; i++) |
| 262 | sid[i] = be32_to_cpu(sid[i]); |
| 263 | |
| 264 | return 0; |
| 265 | } |
Hans de Goede | 6391f0e | 2015-12-20 16:14:31 +0100 | [diff] [blame] | 266 | |
Samuel Holland | 41a545f | 2021-08-22 18:18:05 -0500 | [diff] [blame] | 267 | #if !IS_ENABLED(CONFIG_SYSRESET_CMD_POWEROFF) |
Simon Glass | ed38aef | 2020-05-10 11:40:03 -0600 | [diff] [blame] | 268 | int do_poweroff(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[]) |
Hans de Goede | 6391f0e | 2015-12-20 16:14:31 +0100 | [diff] [blame] | 269 | { |
| 270 | pmic_bus_write(AXP221_SHUTDOWN, AXP221_SHUTDOWN_POWEROFF); |
| 271 | |
| 272 | /* infinite loop during shutdown */ |
| 273 | while (1) {} |
| 274 | |
| 275 | /* not reached */ |
| 276 | return 0; |
| 277 | } |
Samuel Holland | 41a545f | 2021-08-22 18:18:05 -0500 | [diff] [blame] | 278 | #endif |