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Tom Warren41b68382011-01-27 10:58:05 +00001/*
2 * (C) Copyright 2010,2011
3 * NVIDIA Corporation <www.nvidia.com>
4 *
Wolfgang Denkd79de1d2013-07-08 09:37:19 +02005 * SPDX-License-Identifier: GPL-2.0+
Tom Warren41b68382011-01-27 10:58:05 +00006 */
7
Tom Warrenab371962012-09-19 15:50:56 -07008#ifndef _TEGRA20_H_
9#define _TEGRA20_H_
Tom Warren41b68382011-01-27 10:58:05 +000010
Tom Warrenab371962012-09-19 15:50:56 -070011#define NV_PA_SDRAM_BASE 0x00000000
Marcel Ziswilerc5ecf272014-10-10 23:32:32 +020012#define NV_PA_MC_BASE 0x7000F000
Tom Warren41b68382011-01-27 10:58:05 +000013
Tom Warrenab371962012-09-19 15:50:56 -070014#include <asm/arch-tegra/tegra.h>
Tom Warren41b68382011-01-27 10:58:05 +000015
Tom Warrenab371962012-09-19 15:50:56 -070016#define TEGRA_USB1_BASE 0xC5000000
Tom Warrenab371962012-09-19 15:50:56 -070017
18#define BCT_ODMDATA_OFFSET 4068 /* 12 bytes from end of BCT */
Tom Warren41b68382011-01-27 10:58:05 +000019
Tom Warren795f9d72013-01-23 14:01:01 -070020#define MAX_NUM_CPU 2
21
Tom Warrenab371962012-09-19 15:50:56 -070022#endif /* TEGRA20_H */