| Tom Rini | 53633a8 | 2024-02-29 12:33:36 -0500 | [diff] [blame] | 1 | # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) |
| 2 | # Copyright 2019 BayLibre, SAS |
| 3 | %YAML 1.2 |
| 4 | --- |
| 5 | $id: http://devicetree.org/schemas/spi/amlogic,meson6-spifc.yaml# |
| 6 | $schema: http://devicetree.org/meta-schemas/core.yaml# |
| 7 | |
| 8 | title: Amlogic Meson SPI Flash Controller |
| 9 | |
| 10 | maintainers: |
| 11 | - Neil Armstrong <neil.armstrong@linaro.org> |
| 12 | |
| 13 | allOf: |
| 14 | - $ref: spi-controller.yaml# |
| 15 | |
| 16 | description: | |
| 17 | The Meson SPIFC is a controller optimized for communication with SPI |
| 18 | NOR memories, without DMA support and a 64-byte unified transmit / |
| 19 | receive buffer. |
| 20 | |
| 21 | properties: |
| 22 | compatible: |
| 23 | enum: |
| 24 | - amlogic,meson6-spifc # SPI Flash Controller on Meson6 and compatible SoCs |
| 25 | - amlogic,meson-gxbb-spifc # SPI Flash Controller on GXBB and compatible SoCs |
| 26 | |
| 27 | reg: |
| 28 | maxItems: 1 |
| 29 | |
| 30 | clocks: |
| 31 | maxItems: 1 |
| 32 | |
| 33 | required: |
| 34 | - compatible |
| 35 | - reg |
| 36 | - clocks |
| 37 | |
| 38 | unevaluatedProperties: false |
| 39 | |
| 40 | examples: |
| 41 | - | |
| 42 | spi@c1108c80 { |
| 43 | compatible = "amlogic,meson6-spifc"; |
| 44 | reg = <0xc1108c80 0x80>; |
| 45 | clocks = <&clk81>; |
| 46 | #address-cells = <1>; |
| 47 | #size-cells = <0>; |
| 48 | |
| 49 | flash: flash@0 { |
| 50 | compatible = "spansion,m25p80", "jedec,spi-nor"; |
| 51 | reg = <0>; |
| 52 | spi-max-frequency = <40000000>; |
| 53 | }; |
| 54 | }; |