| Tom Rini | 53633a8 | 2024-02-29 12:33:36 -0500 | [diff] [blame] | 1 | Broadcom Northstar plus (NSP) GPIO/PINCONF Controller |
| 2 | |
| 3 | Required properties: |
| 4 | - compatible: |
| 5 | Must be "brcm,nsp-gpio-a" |
| 6 | |
| 7 | - reg: |
| 8 | Should contain the register physical address and length for each of |
| 9 | GPIO base, IO control registers |
| 10 | |
| 11 | - #gpio-cells: |
| 12 | Must be two. The first cell is the GPIO pin number (within the |
| 13 | controller's pin space) and the second cell is used for the following: |
| 14 | bit[0]: polarity (0 for active high and 1 for active low) |
| 15 | |
| 16 | - gpio-controller: |
| 17 | Specifies that the node is a GPIO controller |
| 18 | |
| 19 | - ngpios: |
| 20 | Number of gpios supported (58x25 supports 32 and 58x23 supports 24) |
| 21 | |
| 22 | Optional properties: |
| 23 | - interrupts: |
| 24 | Interrupt ID |
| 25 | |
| 26 | - interrupt-controller: |
| 27 | Specifies that the node is an interrupt controller |
| 28 | |
| 29 | - gpio-ranges: |
| 30 | Specifies the mapping between gpio controller and pin-controllers pins. |
| 31 | This requires 4 fields in cells defined as - |
| 32 | 1. Phandle of pin-controller. |
| 33 | 2. GPIO base pin offset. |
| 34 | 3 Pin-control base pin offset. |
| 35 | 4. number of gpio pins which are linearly mapped from pin base. |
| 36 | |
| 37 | Supported generic PINCONF properties in child nodes: |
| 38 | - pins: |
| 39 | The list of pins (within the controller's own pin space) that properties |
| 40 | in the node apply to. Pin names are "gpio-<pin>" |
| 41 | |
| 42 | - bias-disable: |
| 43 | Disable pin bias |
| 44 | |
| 45 | - bias-pull-up: |
| 46 | Enable internal pull up resistor |
| 47 | |
| 48 | - bias-pull-down: |
| 49 | Enable internal pull down resistor |
| 50 | |
| 51 | - drive-strength: |
| 52 | Valid drive strength values include 2, 4, 6, 8, 10, 12, 14, 16 (mA) |
| 53 | |
| 54 | Example: |
| 55 | |
| 56 | gpioa: gpio@18000020 { |
| 57 | compatible = "brcm,nsp-gpio-a"; |
| 58 | reg = <0x18000020 0x100>, |
| 59 | <0x1803f1c4 0x1c>; |
| 60 | #gpio-cells = <2>; |
| 61 | gpio-controller; |
| 62 | ngpios = <32>; |
| 63 | gpio-ranges = <&pinctrl 0 0 31>; |
| 64 | interrupt-controller; |
| 65 | interrupts = <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>; |
| 66 | |
| 67 | /* Hog a few default settings */ |
| 68 | pinctrl-names = "default"; |
| 69 | pinctrl-0 = <&led>; |
| 70 | led: led { |
| 71 | pins = "gpio-1"; |
| 72 | bias-pull-up; |
| 73 | }; |
| 74 | |
| 75 | pwr: pwr { |
| 76 | gpio-hog; |
| 77 | gpios = <3 1>; |
| 78 | output-high; |
| 79 | }; |
| 80 | }; |