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Tom Rini53633a82024-02-29 12:33:36 -05001# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
2# Copyright 2020 BayLibre, SAS
3%YAML 1.2
4---
5$id: http://devicetree.org/schemas/phy/amlogic,axg-mipi-dphy.yaml#
6$schema: http://devicetree.org/meta-schemas/core.yaml#
7
8title: Amlogic AXG MIPI D-PHY
9
10maintainers:
11 - Neil Armstrong <neil.armstrong@linaro.org>
12
13properties:
14 compatible:
15 enum:
16 - amlogic,axg-mipi-dphy
17
18 reg:
19 maxItems: 1
20
21 clocks:
22 maxItems: 1
23
24 clock-names:
25 items:
26 - const: pclk
27
28 resets:
29 maxItems: 1
30
31 reset-names:
32 items:
33 - const: phy
34
35 "#phy-cells":
36 const: 0
37
38 phys:
39 maxItems: 1
40
41 phy-names:
42 items:
43 - const: analog
44
45required:
46 - compatible
47 - reg
48 - clocks
49 - clock-names
50 - resets
51 - reset-names
52 - phys
53 - phy-names
54 - "#phy-cells"
55
56additionalProperties: false
57
58examples:
59 - |
60 phy@ff640000 {
61 compatible = "amlogic,axg-mipi-dphy";
62 reg = <0xff640000 0x100>;
63 clocks = <&clk_mipi_dsi_phy>;
64 clock-names = "pclk";
65 resets = <&reset_phy>;
66 reset-names = "phy";
67 phys = <&mipi_pcie_analog_dphy>;
68 phy-names = "analog";
69 #phy-cells = <0>;
70 };