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Tom Rini53633a82024-02-29 12:33:36 -05001# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/net/amlogic,g12a-mdio-mux.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: MDIO bus multiplexer/glue of Amlogic G12a SoC family
8
9description:
10 This is a special case of a MDIO bus multiplexer. It allows to choose between
11 the internal mdio bus leading to the embedded 10/100 PHY or the external
12 MDIO bus.
13
14maintainers:
15 - Neil Armstrong <neil.armstrong@linaro.org>
16
17allOf:
18 - $ref: mdio-mux.yaml#
19
20properties:
21 compatible:
22 const: amlogic,g12a-mdio-mux
23
24 reg:
25 maxItems: 1
26
27 clocks:
28 items:
29 - description: peripheral clock
30 - description: platform crytal
31 - description: SoC 50MHz MPLL
32
33 clock-names:
34 items:
35 - const: pclk
36 - const: clkin0
37 - const: clkin1
38
39required:
40 - compatible
41 - reg
42 - clocks
43 - clock-names
44
45unevaluatedProperties: false
46
47examples:
48 - |
49 #include <dt-bindings/interrupt-controller/irq.h>
50 #include <dt-bindings/interrupt-controller/arm-gic.h>
51 mdio-multiplexer@4c000 {
52 compatible = "amlogic,g12a-mdio-mux";
53 reg = <0x4c000 0xa4>;
54 clocks = <&clkc_eth_phy>, <&xtal>, <&clkc_mpll>;
55 clock-names = "pclk", "clkin0", "clkin1";
56 mdio-parent-bus = <&mdio0>;
57 #address-cells = <1>;
58 #size-cells = <0>;
59
60 mdio@0 {
61 reg = <0>;
62 #address-cells = <1>;
63 #size-cells = <0>;
64 };
65
66 mdio@1 {
67 reg = <1>;
68 #address-cells = <1>;
69 #size-cells = <0>;
70
71 ethernet-phy@8 {
72 compatible = "ethernet-phy-id0180.3301",
73 "ethernet-phy-ieee802.3-c22";
74 interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
75 reg = <8>;
76 max-speed = <100>;
77 };
78 };
79 };
80...