| Tom Rini | 53633a8 | 2024-02-29 12:33:36 -0500 | [diff] [blame] | 1 | # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) |
| 2 | %YAML 1.2 |
| 3 | --- |
| 4 | $id: http://devicetree.org/schemas/mtd/st,stm32-fmc2-nand.yaml# |
| 5 | $schema: http://devicetree.org/meta-schemas/core.yaml# |
| 6 | |
| 7 | title: STMicroelectronics Flexible Memory Controller 2 (FMC2) |
| 8 | |
| 9 | maintainers: |
| 10 | - Christophe Kerello <christophe.kerello@foss.st.com> |
| 11 | |
| 12 | properties: |
| 13 | compatible: |
| 14 | enum: |
| 15 | - st,stm32mp15-fmc2 |
| 16 | - st,stm32mp1-fmc2-nfc |
| 17 | |
| 18 | reg: |
| 19 | minItems: 6 |
| 20 | maxItems: 7 |
| 21 | |
| 22 | interrupts: |
| 23 | maxItems: 1 |
| 24 | |
| 25 | dmas: |
| 26 | items: |
| 27 | - description: tx DMA channel |
| 28 | - description: rx DMA channel |
| 29 | - description: ecc DMA channel |
| 30 | |
| 31 | dma-names: |
| 32 | items: |
| 33 | - const: tx |
| 34 | - const: rx |
| 35 | - const: ecc |
| 36 | |
| 37 | patternProperties: |
| 38 | "^nand@[a-f0-9]$": |
| 39 | type: object |
| 40 | $ref: raw-nand-chip.yaml |
| 41 | properties: |
| 42 | nand-ecc-step-size: |
| 43 | const: 512 |
| 44 | |
| 45 | nand-ecc-strength: |
| 46 | enum: [1, 4, 8] |
| 47 | |
| 48 | unevaluatedProperties: false |
| 49 | |
| 50 | allOf: |
| 51 | - $ref: nand-controller.yaml# |
| 52 | |
| 53 | - if: |
| 54 | properties: |
| 55 | compatible: |
| 56 | contains: |
| 57 | const: st,stm32mp15-fmc2 |
| 58 | then: |
| 59 | properties: |
| 60 | reg: |
| 61 | items: |
| 62 | - description: Registers |
| 63 | - description: Chip select 0 data |
| 64 | - description: Chip select 0 command |
| 65 | - description: Chip select 0 address space |
| 66 | - description: Chip select 1 data |
| 67 | - description: Chip select 1 command |
| 68 | - description: Chip select 1 address space |
| 69 | |
| 70 | clocks: |
| 71 | maxItems: 1 |
| 72 | |
| 73 | resets: |
| 74 | maxItems: 1 |
| 75 | |
| 76 | required: |
| 77 | - clocks |
| 78 | |
| 79 | - if: |
| 80 | properties: |
| 81 | compatible: |
| 82 | contains: |
| 83 | const: st,stm32mp1-fmc2-nfc |
| 84 | then: |
| 85 | properties: |
| 86 | reg: |
| 87 | items: |
| 88 | - description: Chip select 0 data |
| 89 | - description: Chip select 0 command |
| 90 | - description: Chip select 0 address space |
| 91 | - description: Chip select 1 data |
| 92 | - description: Chip select 1 command |
| 93 | - description: Chip select 1 address space |
| 94 | |
| 95 | required: |
| 96 | - compatible |
| 97 | - reg |
| 98 | - interrupts |
| 99 | |
| 100 | unevaluatedProperties: false |
| 101 | |
| 102 | examples: |
| 103 | - | |
| 104 | #include <dt-bindings/interrupt-controller/arm-gic.h> |
| 105 | #include <dt-bindings/clock/stm32mp1-clks.h> |
| 106 | #include <dt-bindings/reset/stm32mp1-resets.h> |
| 107 | |
| 108 | nand-controller@58002000 { |
| 109 | compatible = "st,stm32mp15-fmc2"; |
| 110 | reg = <0x58002000 0x1000>, |
| 111 | <0x80000000 0x1000>, |
| 112 | <0x88010000 0x1000>, |
| 113 | <0x88020000 0x1000>, |
| 114 | <0x81000000 0x1000>, |
| 115 | <0x89010000 0x1000>, |
| 116 | <0x89020000 0x1000>; |
| 117 | interrupts = <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>; |
| 118 | dmas = <&mdma1 20 0x2 0x12000a02 0x0 0x0>, |
| 119 | <&mdma1 20 0x2 0x12000a08 0x0 0x0>, |
| 120 | <&mdma1 21 0x2 0x12000a0a 0x0 0x0>; |
| 121 | dma-names = "tx", "rx", "ecc"; |
| 122 | clocks = <&rcc FMC_K>; |
| 123 | resets = <&rcc FMC_R>; |
| 124 | #address-cells = <1>; |
| 125 | #size-cells = <0>; |
| 126 | |
| 127 | nand@0 { |
| 128 | reg = <0>; |
| 129 | nand-on-flash-bbt; |
| 130 | #address-cells = <1>; |
| 131 | #size-cells = <1>; |
| 132 | }; |
| 133 | }; |
| 134 | |
| 135 | ... |