blob: fda0467cdd954599d556fb865f78b55c20ffa163 [file] [log] [blame]
Tom Rini53633a82024-02-29 12:33:36 -05001# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/i2c/i2c-mt65xx.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: MediaTek I2C controller
8
9description:
10 This driver interfaces with the native I2C controller present in
11 various MediaTek SoCs.
12
13allOf:
14 - $ref: /schemas/i2c/i2c-controller.yaml#
15
16maintainers:
17 - Qii Wang <qii.wang@mediatek.com>
18
19properties:
20 compatible:
21 oneOf:
22 - const: mediatek,mt2712-i2c
23 - const: mediatek,mt6577-i2c
24 - const: mediatek,mt6589-i2c
25 - const: mediatek,mt7622-i2c
26 - const: mediatek,mt7981-i2c
27 - const: mediatek,mt7986-i2c
28 - const: mediatek,mt8168-i2c
29 - const: mediatek,mt8173-i2c
30 - const: mediatek,mt8183-i2c
31 - const: mediatek,mt8186-i2c
32 - const: mediatek,mt8188-i2c
33 - const: mediatek,mt8192-i2c
34 - items:
35 - enum:
36 - mediatek,mt7629-i2c
37 - mediatek,mt8516-i2c
38 - const: mediatek,mt2712-i2c
39 - items:
40 - enum:
41 - mediatek,mt2701-i2c
42 - mediatek,mt6797-i2c
43 - mediatek,mt7623-i2c
44 - const: mediatek,mt6577-i2c
45 - items:
46 - enum:
47 - mediatek,mt8365-i2c
48 - const: mediatek,mt8168-i2c
49 - items:
50 - enum:
51 - mediatek,mt6795-i2c
52 - const: mediatek,mt8173-i2c
53 - items:
54 - enum:
55 - mediatek,mt8195-i2c
56 - const: mediatek,mt8192-i2c
57
58 reg:
59 items:
60 - description: Physical base address
61 - description: DMA base address
62
63 interrupts:
64 maxItems: 1
65
66 clocks:
67 minItems: 2
68 items:
69 - description: Main clock for I2C bus
70 - description: Clock for I2C via DMA
71 - description: Bus arbitrator clock
72 - description: Clock for I2C from PMIC
73
74 clock-names:
75 minItems: 2
76 items:
77 - const: main
78 - const: dma
79 - const: arb
80 - const: pmic
81
82 clock-div:
83 $ref: /schemas/types.yaml#/definitions/uint32
84 description: Frequency divider of clock source in I2C module
85
86 clock-frequency:
87 default: 100000
88 description:
89 SCL frequency to use (in Hz). If omitted, 100kHz is used.
90
91 mediatek,have-pmic:
92 description: Platform controls I2C from PMIC side
93 type: boolean
94
95 mediatek,use-push-pull:
96 description: Use push-pull mode I/O config
97 type: boolean
98
99 vbus-supply:
100 description: Phandle to the regulator providing power to SCL/SDA
101
102required:
103 - compatible
104 - reg
105 - clocks
106 - clock-names
107 - clock-div
108 - interrupts
109
110unevaluatedProperties: false
111
112examples:
113 - |
114 #include <dt-bindings/interrupt-controller/arm-gic.h>
115 #include <dt-bindings/interrupt-controller/irq.h>
116
117 i2c0: i2c@1100d000 {
118 compatible = "mediatek,mt6577-i2c";
119 reg = <0x1100d000 0x70>, <0x11000300 0x80>;
120 interrupts = <GIC_SPI 44 IRQ_TYPE_LEVEL_LOW>;
121 clocks = <&i2c0_ck>, <&ap_dma_ck>;
122 clock-names = "main", "dma";
123 clock-div = <16>;
124 clock-frequency = <400000>;
125 mediatek,have-pmic;
126
127 #address-cells = <1>;
128 #size-cells = <0>;
129 };