blob: da61d1ddc9c3fdab6440e43f81e184ed8cd4927c [file] [log] [blame]
Tom Rini53633a82024-02-29 12:33:36 -05001# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/dma/socionext,uniphier-xdmac.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Socionext UniPhier external DMA controller
8
9description: |
10 This describes the devicetree bindings for an external DMA engine to perform
11 memory-to-memory or peripheral-to-memory data transfer capable of supporting
12 16 channels, implemented in Socionext UniPhier SoCs.
13
14maintainers:
15 - Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
16
17allOf:
18 - $ref: dma-controller.yaml#
19
20properties:
21 compatible:
22 const: socionext,uniphier-xdmac
23
24 reg:
25 maxItems: 1
26
27 interrupts:
28 maxItems: 1
29
30 "#dma-cells":
31 const: 2
32 description: |
33 DMA request from clients consists of 2 cells:
34 1. Channel index
35 2. Transfer request factor number, If no transfer factor, use 0.
36 The number is SoC-specific, and this should be specified with
37 relation to the device to use the DMA controller.
38
39 dma-channels:
40 minimum: 1
41 maximum: 16
42
43additionalProperties: false
44
45required:
46 - compatible
47 - reg
48 - interrupts
49 - "#dma-cells"
50 - dma-channels
51
52examples:
53 - |
54 xdmac: dma-controller@5fc10000 {
55 compatible = "socionext,uniphier-xdmac";
56 reg = <0x5fc10000 0x5300>;
57 interrupts = <0 188 4>;
58 #dma-cells = <2>;
59 dma-channels = <16>;
60 };
61
62...