blob: 10a2f15b08a38305e1508c6b04cf600e71f91190 [file] [log] [blame]
Tom Rini53633a82024-02-29 12:33:36 -05001* Hisilicon K3 DMA controller
2
3See dma.txt first
4
5Required properties:
6- compatible: Must be one of
7- "hisilicon,k3-dma-1.0"
8- "hisilicon,hisi-pcm-asp-dma-1.0"
9- reg: Should contain DMA registers location and length.
10- interrupts: Should contain one interrupt shared by all channel
11- #dma-cells: see dma.txt, should be 1, para number
12- dma-channels: physical channels supported
13- dma-requests: virtual channels supported, each virtual channel
14 have specific request line
15- clocks: clock required
16
17Example:
18
19Controller:
20 dma0: dma@fcd02000 {
21 compatible = "hisilicon,k3-dma-1.0";
22 reg = <0xfcd02000 0x1000>;
23 #dma-cells = <1>;
24 dma-channels = <16>;
25 dma-requests = <27>;
26 interrupts = <0 12 4>;
27 clocks = <&pclk>;
28 };
29
30Client:
31Use specific request line passing from dmax
32For example, i2c0 read channel request line is 18, while write channel use 19
33
34 i2c0: i2c@fcb08000 {
35 compatible = "snps,designware-i2c";
36 dmas = <&dma0 18 /* read channel */
37 &dma0 19>; /* write channel */
38 dma-names = "rx", "tx";
39 };
40
41 i2c1: i2c@fcb09000 {
42 compatible = "snps,designware-i2c";
43 dmas = <&dma0 20 /* read channel */
44 &dma0 21>; /* write channel */
45 dma-names = "rx", "tx";
46 };
47