dts/upstream/Bindings/dma/apm-xgene-dma.txt

Applied Micro X-Gene SoC DMA nodes

DMA nodes are defined to describe on-chip DMA interfaces in
APM X-Gene SoC.

Required properties for DMA interfaces:
- compatible: Should be "apm,xgene-dma".
- device_type: set to "dma".
- reg: Address and length of the register set for the device.
  It contains the information of registers in the following order:
  1st - DMA control and status register address space.
  2nd - Descriptor ring control and status register address space.
  3rd - Descriptor ring command register address space.
  4th - Soc efuse register address space.
- interrupts: DMA has 5 interrupts sources. 1st interrupt is
  DMA error reporting interrupt. 2nd, 3rd, 4th and 5th interrupts
  are completion interrupts for each DMA channels.
- clocks: Reference to the clock entry.

Optional properties:
- dma-coherent : Present if dma operations are coherent

Example:
	dmaclk: dmaclk@1f27c000 {
		compatible = "apm,xgene-device-clock";
		#clock-cells = <1>;
		clocks = <&socplldiv2 0>;
		reg = <0x0 0x1f27c000 0x0 0x1000>;
		reg-names = "csr-reg";
		clock-output-names = "dmaclk";
	};

	dma: dma@1f270000 {
			compatible = "apm,xgene-storm-dma";
			device_type = "dma";
			reg = <0x0 0x1f270000 0x0 0x10000>,
			      <0x0 0x1f200000 0x0 0x10000>,
			      <0x0 0x1b000000 0x0 0x400000>,
			      <0x0 0x1054a000 0x0 0x100>;
			interrupts = <0x0 0x82 0x4>,
				     <0x0 0xb8 0x4>,
				     <0x0 0xb9 0x4>,
				     <0x0 0xba 0x4>,
				     <0x0 0xbb 0x4>;
			dma-coherent;
			clocks = <&dmaclk 0>;
	};