blob: fa07a40d100403956520565d41d7a3c3903d5332 [file] [log] [blame]
Tom Rini53633a82024-02-29 12:33:36 -05001# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/display/tegra/nvidia,tegra210-csi.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: NVIDIA Tegra CSI controller
8
9maintainers:
10 - Thierry Reding <thierry.reding@gmail.com>
11 - Jon Hunter <jonathanh@nvidia.com>
12
13properties:
14 $nodename:
15 pattern: "^csi@[0-9a-f]+$"
16
17 compatible:
18 enum:
19 - nvidia,tegra210-csi
20
21 reg:
22 maxItems: 1
23
24 clocks:
25 items:
26 - description: module clock
27 - description: A/B lanes clock
28 - description: C/D lanes clock
29 - description: E lane clock
30 - description: test pattern generator clock
31
32 clock-names:
33 items:
34 - const: csi
35 - const: cilab
36 - const: cilcd
37 - const: cile
38 - const: csi_tpg
39
40 power-domains:
41 maxItems: 1
42
43additionalProperties: false
44
45required:
46 - compatible
47 - reg
48 - clocks
49 - clock-names
50 - power-domains
51
52# see nvidia,tegra20-vi.yaml for an example