dts/upstream/Bindings/display/panel/advantech,idk-2121wr.yaml

# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/display/panel/advantech,idk-2121wr.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: Advantech IDK-2121WR 21.5" Full-HD dual-LVDS panel

maintainers:
  - Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
  - Thierry Reding <thierry.reding@gmail.com>

description: |
  The IDK-2121WR from Advantech is a Full-HD dual-LVDS panel.
  A dual-LVDS interface is a dual-link connection with even pixels traveling
  on one link, and with odd pixels traveling on the other link.

  The panel expects odd pixels on the first port, and even pixels on the
  second port, therefore the ports must be marked accordingly (with either
  dual-lvds-odd-pixels or dual-lvds-even-pixels).

allOf:
  - $ref: panel-common.yaml#

properties:
  compatible:
    items:
      - const: advantech,idk-2121wr
      - {} # panel-lvds, but not listed here to avoid false select

  width-mm:
    const: 476

  height-mm:
    const: 268

  data-mapping:
    const: vesa-24

  panel-timing: true

  ports:
    $ref: /schemas/graph.yaml#/properties/ports

    properties:
      port@0:
        $ref: /schemas/graph.yaml#/$defs/port-base
        unevaluatedProperties: false
        description: The sink for odd pixels.
        properties:
          dual-lvds-odd-pixels: true

        required:
          - dual-lvds-odd-pixels

      port@1:
        $ref: /schemas/graph.yaml#/$defs/port-base
        unevaluatedProperties: false
        description: The sink for even pixels.
        properties:
          dual-lvds-even-pixels: true

        required:
          - dual-lvds-even-pixels

    required:
      - port@0
      - port@1

additionalProperties: false

required:
  - compatible
  - width-mm
  - height-mm
  - data-mapping
  - panel-timing
  - ports

examples:
  - |+
    panel-lvds {
      compatible = "advantech,idk-2121wr", "panel-lvds";

      width-mm = <476>;
      height-mm = <268>;

      data-mapping = "vesa-24";

      panel-timing {
        clock-frequency = <148500000>;
        hactive = <1920>;
        vactive = <1080>;
        hsync-len = <44>;
        hfront-porch = <88>;
        hback-porch = <148>;
        vfront-porch = <4>;
        vback-porch = <36>;
        vsync-len = <5>;
      };

      ports {
        #address-cells = <1>;
        #size-cells = <0>;

        port@0 {
          reg = <0>;
          dual-lvds-odd-pixels;
          panel_in0: endpoint {
            remote-endpoint = <&lvds0_out>;
          };
        };

        port@1 {
          reg = <1>;
          dual-lvds-even-pixels;
          panel_in1: endpoint {
            remote-endpoint = <&lvds1_out>;
          };
        };
      };
    };

...