| Tom Rini | 53633a8 | 2024-02-29 12:33:36 -0500 | [diff] [blame] | 1 | * TI - MPU (Main Processor Unit) subsystem |
| 2 | |
| 3 | The MPU subsystem contain one or several ARM cores |
| 4 | depending of the version. |
| 5 | The MPU contain CPUs, GIC, L2 cache and a local PRCM. |
| 6 | |
| 7 | Required properties: |
| 8 | - compatible : Should be "ti,omap3-mpu" for OMAP3 |
| 9 | Should be "ti,omap4-mpu" for OMAP4 |
| 10 | Should be "ti,omap5-mpu" for OMAP5 |
| 11 | - ti,hwmods: "mpu" |
| 12 | |
| 13 | Optional properties: |
| 14 | - sram: Phandle to the ocmcram node |
| 15 | |
| 16 | am335x and am437x only: |
| 17 | - pm-sram: Phandles to ocmcram nodes to be used for power management. |
| 18 | First should be type 'protect-exec' for the driver to use to copy |
| 19 | and run PM functions, second should be regular pool to be used for |
| 20 | data region for code. See Documentation/devicetree/bindings/sram/sram.yaml |
| 21 | for more details. |
| 22 | |
| 23 | Examples: |
| 24 | |
| 25 | - For an OMAP5 SMP system: |
| 26 | |
| 27 | mpu { |
| 28 | compatible = "ti,omap5-mpu"; |
| 29 | ti,hwmods = "mpu" |
| 30 | }; |
| 31 | |
| 32 | - For an OMAP4 SMP system: |
| 33 | |
| 34 | mpu { |
| 35 | compatible = "ti,omap4-mpu"; |
| 36 | ti,hwmods = "mpu"; |
| 37 | }; |
| 38 | |
| 39 | |
| 40 | - For an OMAP3 monocore system: |
| 41 | |
| 42 | mpu { |
| 43 | compatible = "ti,omap3-mpu"; |
| 44 | ti,hwmods = "mpu"; |
| 45 | }; |
| 46 | |
| 47 | - For an AM335x system: |
| 48 | |
| 49 | mpu { |
| 50 | compatible = "ti,omap3-mpu"; |
| 51 | ti,hwmods = "mpu"; |
| 52 | pm-sram = <&pm_sram_code |
| 53 | &pm_sram_data>; |
| 54 | }; |