blob: f049e36380fcf8e8220af7397de091f693c4f348 [file] [log] [blame]
Tom Rini10e47792018-05-06 17:58:06 -04001// SPDX-License-Identifier: GPL-2.0+
Simon Glass36ad2342015-06-23 15:39:15 -06002/*
3 * Copyright (C) 2015 Google, Inc
4 * Written by Simon Glass <sjg@chromium.org>
Stephen Warrena9622432016-06-17 09:44:00 -06005 * Copyright (c) 2016, NVIDIA CORPORATION.
Philipp Tomsich9cf03b02018-01-08 13:59:18 +01006 * Copyright (c) 2018, Theobroma Systems Design und Consulting GmbH
Simon Glass36ad2342015-06-23 15:39:15 -06007 */
8
Patrick Delaunay81313352021-04-27 11:02:19 +02009#define LOG_CATEGORY UCLASS_CLK
10
Simon Glass36ad2342015-06-23 15:39:15 -060011#include <common.h>
12#include <clk.h>
Stephen Warrena9622432016-06-17 09:44:00 -060013#include <clk-uclass.h>
Simon Glass36ad2342015-06-23 15:39:15 -060014#include <dm.h>
Simon Glass589d9152016-07-04 11:58:03 -060015#include <dt-structs.h>
Simon Glass36ad2342015-06-23 15:39:15 -060016#include <errno.h>
Simon Glass0f2af882020-05-10 11:40:05 -060017#include <log.h>
Simon Glass9bc15642020-02-03 07:36:16 -070018#include <malloc.h>
Sean Andersond7ac3732021-04-08 22:13:03 -040019#include <dm/device_compat.h>
Claudiu Bezneac8c16002020-09-07 17:46:34 +030020#include <dm/device-internal.h>
Simon Glassd66c5f72020-02-03 07:36:15 -070021#include <dm/devres.h>
22#include <dm/read.h>
Simon Glassc06c1be2020-05-10 11:40:08 -060023#include <linux/bug.h>
Lukasz Majewski9e38dc32019-06-24 15:50:42 +020024#include <linux/clk-provider.h>
Simon Glassd66c5f72020-02-03 07:36:15 -070025#include <linux/err.h>
Simon Glass3ba929a2020-10-30 21:38:53 -060026#include <asm/global_data.h>
Simon Glass36ad2342015-06-23 15:39:15 -060027
Mario Six799fe562018-01-15 11:06:51 +010028static inline const struct clk_ops *clk_dev_ops(struct udevice *dev)
Simon Glass36ad2342015-06-23 15:39:15 -060029{
Mario Six799fe562018-01-15 11:06:51 +010030 return (const struct clk_ops *)dev->driver->ops;
Simon Glass36ad2342015-06-23 15:39:15 -060031}
32
Simon Glass43033962020-07-19 10:15:56 -060033struct clk *dev_get_clk_ptr(struct udevice *dev)
34{
35 return (struct clk *)dev_get_uclass_priv(dev);
36}
37
Stephen Warrena9622432016-06-17 09:44:00 -060038#if CONFIG_IS_ENABLED(OF_CONTROL)
Simon Glass589d9152016-07-04 11:58:03 -060039# if CONFIG_IS_ENABLED(OF_PLATDATA)
Walter Lozanodc5b4372020-06-25 01:10:13 -030040int clk_get_by_driver_info(struct udevice *dev, struct phandle_1_arg *cells,
41 struct clk *clk)
Simon Glass589d9152016-07-04 11:58:03 -060042{
43 int ret;
44
Simon Glass0000e0d2021-03-15 17:25:28 +130045 ret = device_get_by_ofplat_idx(cells->idx, &clk->dev);
Simon Glass589d9152016-07-04 11:58:03 -060046 if (ret)
47 return ret;
Walter Lozanodc5b4372020-06-25 01:10:13 -030048 clk->id = cells->arg[0];
Simon Glass589d9152016-07-04 11:58:03 -060049
50 return 0;
51}
52# else
Stephen Warrena9622432016-06-17 09:44:00 -060053static int clk_of_xlate_default(struct clk *clk,
Simon Glassb7ae2772017-05-18 20:09:40 -060054 struct ofnode_phandle_args *args)
Simon Glass36ad2342015-06-23 15:39:15 -060055{
Stephen Warrena9622432016-06-17 09:44:00 -060056 debug("%s(clk=%p)\n", __func__, clk);
Simon Glass36ad2342015-06-23 15:39:15 -060057
Stephen Warrena9622432016-06-17 09:44:00 -060058 if (args->args_count > 1) {
59 debug("Invaild args_count: %d\n", args->args_count);
60 return -EINVAL;
61 }
Simon Glass36ad2342015-06-23 15:39:15 -060062
Stephen Warrena9622432016-06-17 09:44:00 -060063 if (args->args_count)
64 clk->id = args->args[0];
65 else
66 clk->id = 0;
Simon Glass36ad2342015-06-23 15:39:15 -060067
Sekhar Nori3d23abd2019-07-11 14:30:24 +053068 clk->data = 0;
69
Stephen Warrena9622432016-06-17 09:44:00 -060070 return 0;
Simon Glass36ad2342015-06-23 15:39:15 -060071}
Simon Glass0342bd22016-01-20 19:43:02 -070072
Jagan Tekifc7c7ce2019-02-28 00:26:52 +053073static int clk_get_by_index_tail(int ret, ofnode node,
74 struct ofnode_phandle_args *args,
75 const char *list_name, int index,
76 struct clk *clk)
77{
78 struct udevice *dev_clk;
79 const struct clk_ops *ops;
80
81 assert(clk);
82 clk->dev = NULL;
83 if (ret)
84 goto err;
85
86 ret = uclass_get_device_by_ofnode(UCLASS_CLK, args->node, &dev_clk);
87 if (ret) {
88 debug("%s: uclass_get_device_by_of_offset failed: err=%d\n",
89 __func__, ret);
Simon Glassf73f5812021-01-21 13:57:11 -070090 return log_msg_ret("get", ret);
Jagan Tekifc7c7ce2019-02-28 00:26:52 +053091 }
92
93 clk->dev = dev_clk;
94
95 ops = clk_dev_ops(dev_clk);
96
97 if (ops->of_xlate)
98 ret = ops->of_xlate(clk, args);
99 else
100 ret = clk_of_xlate_default(clk, args);
101 if (ret) {
102 debug("of_xlate() failed: %d\n", ret);
Simon Glassf73f5812021-01-21 13:57:11 -0700103 return log_msg_ret("xlate", ret);
Jagan Tekifc7c7ce2019-02-28 00:26:52 +0530104 }
105
106 return clk_request(dev_clk, clk);
107err:
108 debug("%s: Node '%s', property '%s', failed to request CLK index %d: %d\n",
109 __func__, ofnode_get_name(node), list_name, index, ret);
Simon Glassf73f5812021-01-21 13:57:11 -0700110
111 return log_msg_ret("prop", ret);
Jagan Tekifc7c7ce2019-02-28 00:26:52 +0530112}
113
Philipp Tomsichf7604342018-01-08 11:18:18 +0100114static int clk_get_by_indexed_prop(struct udevice *dev, const char *prop_name,
115 int index, struct clk *clk)
Simon Glass0342bd22016-01-20 19:43:02 -0700116{
Simon Glass0342bd22016-01-20 19:43:02 -0700117 int ret;
Simon Glass2558bff2017-05-30 21:47:29 -0600118 struct ofnode_phandle_args args;
Simon Glass0342bd22016-01-20 19:43:02 -0700119
Stephen Warrena9622432016-06-17 09:44:00 -0600120 debug("%s(dev=%p, index=%d, clk=%p)\n", __func__, dev, index, clk);
121
122 assert(clk);
Patrice Chotard96fc03d2017-07-18 11:57:07 +0200123 clk->dev = NULL;
124
Philipp Tomsichf7604342018-01-08 11:18:18 +0100125 ret = dev_read_phandle_with_args(dev, prop_name, "#clock-cells", 0,
Mario Six799fe562018-01-15 11:06:51 +0100126 index, &args);
Simon Glass0342bd22016-01-20 19:43:02 -0700127 if (ret) {
128 debug("%s: fdtdec_parse_phandle_with_args failed: err=%d\n",
129 __func__, ret);
Simon Glassf73f5812021-01-21 13:57:11 -0700130 return log_ret(ret);
Simon Glass0342bd22016-01-20 19:43:02 -0700131 }
132
Stephen Warrena9622432016-06-17 09:44:00 -0600133
Jagan Tekia77add32019-02-28 00:26:53 +0530134 return clk_get_by_index_tail(ret, dev_ofnode(dev), &args, "clocks",
Sean Andersonf0d5a6b2020-06-24 06:41:08 -0400135 index, clk);
Stephen Warrena9622432016-06-17 09:44:00 -0600136}
Philipp Tomsichf7604342018-01-08 11:18:18 +0100137
138int clk_get_by_index(struct udevice *dev, int index, struct clk *clk)
139{
Jagan Tekifc7c7ce2019-02-28 00:26:52 +0530140 struct ofnode_phandle_args args;
141 int ret;
142
143 ret = dev_read_phandle_with_args(dev, "clocks", "#clock-cells", 0,
144 index, &args);
145
146 return clk_get_by_index_tail(ret, dev_ofnode(dev), &args, "clocks",
Sean Andersonf0d5a6b2020-06-24 06:41:08 -0400147 index, clk);
Jagan Tekifc7c7ce2019-02-28 00:26:52 +0530148}
149
150int clk_get_by_index_nodev(ofnode node, int index, struct clk *clk)
151{
152 struct ofnode_phandle_args args;
153 int ret;
154
155 ret = ofnode_parse_phandle_with_args(node, "clocks", "#clock-cells", 0,
Sean Andersonf0d5a6b2020-06-24 06:41:08 -0400156 index, &args);
Jagan Tekifc7c7ce2019-02-28 00:26:52 +0530157
158 return clk_get_by_index_tail(ret, node, &args, "clocks",
Sean Andersonf0d5a6b2020-06-24 06:41:08 -0400159 index, clk);
Philipp Tomsichf7604342018-01-08 11:18:18 +0100160}
Philipp Tomsich9cf03b02018-01-08 13:59:18 +0100161
Neil Armstrong8a275a02018-04-03 11:44:18 +0200162int clk_get_bulk(struct udevice *dev, struct clk_bulk *bulk)
163{
164 int i, ret, err, count;
Patrick Delaunayb9c32142021-04-27 10:57:54 +0200165
Neil Armstrong8a275a02018-04-03 11:44:18 +0200166 bulk->count = 0;
167
Patrick Delaunayd776a842020-09-25 09:41:14 +0200168 count = dev_count_phandle_with_args(dev, "clocks", "#clock-cells", 0);
Neil Armstrong52b26d92018-04-17 11:30:31 +0200169 if (count < 1)
170 return count;
Neil Armstrong8a275a02018-04-03 11:44:18 +0200171
172 bulk->clks = devm_kcalloc(dev, count, sizeof(struct clk), GFP_KERNEL);
173 if (!bulk->clks)
174 return -ENOMEM;
175
176 for (i = 0; i < count; i++) {
177 ret = clk_get_by_index(dev, i, &bulk->clks[i]);
178 if (ret < 0)
179 goto bulk_get_err;
180
181 ++bulk->count;
182 }
183
184 return 0;
185
186bulk_get_err:
187 err = clk_release_all(bulk->clks, bulk->count);
188 if (err)
189 debug("%s: could release all clocks for %p\n",
190 __func__, dev);
191
192 return ret;
193}
194
Claudiu Bezneab91eee62020-09-07 17:46:36 +0300195static struct clk *clk_set_default_get_by_id(struct clk *clk)
196{
197 struct clk *c = clk;
198
199 if (CONFIG_IS_ENABLED(CLK_CCF)) {
200 int ret = clk_get_by_id(clk->id, &c);
201
202 if (ret) {
203 debug("%s(): could not get parent clock pointer, id %lu\n",
204 __func__, clk->id);
205 ERR_PTR(ret);
206 }
207 }
208
209 return c;
210}
211
Sean Anderson08d531c2021-06-11 00:16:07 -0400212static int clk_set_default_parents(struct udevice *dev,
213 enum clk_defaults_stage stage)
Philipp Tomsich9cf03b02018-01-08 13:59:18 +0100214{
Claudiu Bezneab91eee62020-09-07 17:46:36 +0300215 struct clk clk, parent_clk, *c, *p;
Philipp Tomsich9cf03b02018-01-08 13:59:18 +0100216 int index;
217 int num_parents;
218 int ret;
219
220 num_parents = dev_count_phandle_with_args(dev, "assigned-clock-parents",
Patrick Delaunayd776a842020-09-25 09:41:14 +0200221 "#clock-cells", 0);
Philipp Tomsich9cf03b02018-01-08 13:59:18 +0100222 if (num_parents < 0) {
223 debug("%s: could not read assigned-clock-parents for %p\n",
224 __func__, dev);
225 return 0;
226 }
227
228 for (index = 0; index < num_parents; index++) {
229 ret = clk_get_by_indexed_prop(dev, "assigned-clock-parents",
230 index, &parent_clk);
Neil Armstrongf3cc6312018-07-26 15:19:32 +0200231 /* If -ENOENT, this is a no-op entry */
232 if (ret == -ENOENT)
233 continue;
234
Philipp Tomsich9cf03b02018-01-08 13:59:18 +0100235 if (ret) {
236 debug("%s: could not get parent clock %d for %s\n",
237 __func__, index, dev_read_name(dev));
238 return ret;
239 }
240
Claudiu Bezneab91eee62020-09-07 17:46:36 +0300241 p = clk_set_default_get_by_id(&parent_clk);
242 if (IS_ERR(p))
243 return PTR_ERR(p);
244
Philipp Tomsich9cf03b02018-01-08 13:59:18 +0100245 ret = clk_get_by_indexed_prop(dev, "assigned-clocks",
246 index, &clk);
Tero Kristod41b2b32021-06-11 11:45:11 +0300247 /*
248 * If the clock provider is not ready yet, let it handle
249 * the re-programming later.
250 */
251 if (ret == -EPROBE_DEFER) {
252 ret = 0;
253 continue;
254 }
255
Philipp Tomsich9cf03b02018-01-08 13:59:18 +0100256 if (ret) {
257 debug("%s: could not get assigned clock %d for %s\n",
258 __func__, index, dev_read_name(dev));
259 return ret;
260 }
261
Jean-Jacques Hiblot9601f322019-10-22 14:00:06 +0200262 /* This is clk provider device trying to reparent itself
263 * It cannot be done right now but need to wait after the
264 * device is probed
265 */
Sean Anderson08d531c2021-06-11 00:16:07 -0400266 if (stage == CLK_DEFAULTS_PRE && clk.dev == dev)
Jean-Jacques Hiblot9601f322019-10-22 14:00:06 +0200267 continue;
Philipp Tomsich9cf03b02018-01-08 13:59:18 +0100268
Sean Anderson08d531c2021-06-11 00:16:07 -0400269 if (stage != CLK_DEFAULTS_PRE && clk.dev != dev)
Jean-Jacques Hiblot9601f322019-10-22 14:00:06 +0200270 /* do not setup twice the parent clocks */
271 continue;
272
Claudiu Bezneab91eee62020-09-07 17:46:36 +0300273 c = clk_set_default_get_by_id(&clk);
274 if (IS_ERR(c))
275 return PTR_ERR(c);
276
277 ret = clk_set_parent(c, p);
Philipp Tomsich9cf03b02018-01-08 13:59:18 +0100278 /*
279 * Not all drivers may support clock-reparenting (as of now).
280 * Ignore errors due to this.
281 */
282 if (ret == -ENOSYS)
283 continue;
284
Jean-Jacques Hiblotb2320812019-09-26 15:42:42 +0200285 if (ret < 0) {
Philipp Tomsich9cf03b02018-01-08 13:59:18 +0100286 debug("%s: failed to reparent clock %d for %s\n",
287 __func__, index, dev_read_name(dev));
288 return ret;
289 }
290 }
291
292 return 0;
293}
294
Sean Anderson08d531c2021-06-11 00:16:07 -0400295static int clk_set_default_rates(struct udevice *dev,
296 enum clk_defaults_stage stage)
Philipp Tomsich9cf03b02018-01-08 13:59:18 +0100297{
Claudiu Bezneab91eee62020-09-07 17:46:36 +0300298 struct clk clk, *c;
Philipp Tomsich9cf03b02018-01-08 13:59:18 +0100299 int index;
300 int num_rates;
301 int size;
302 int ret = 0;
303 u32 *rates = NULL;
304
305 size = dev_read_size(dev, "assigned-clock-rates");
306 if (size < 0)
307 return 0;
308
309 num_rates = size / sizeof(u32);
310 rates = calloc(num_rates, sizeof(u32));
311 if (!rates)
312 return -ENOMEM;
313
314 ret = dev_read_u32_array(dev, "assigned-clock-rates", rates, num_rates);
315 if (ret)
316 goto fail;
317
318 for (index = 0; index < num_rates; index++) {
Neil Armstrongf3cc6312018-07-26 15:19:32 +0200319 /* If 0 is passed, this is a no-op */
320 if (!rates[index])
321 continue;
322
Philipp Tomsich9cf03b02018-01-08 13:59:18 +0100323 ret = clk_get_by_indexed_prop(dev, "assigned-clocks",
324 index, &clk);
Tero Kristod41b2b32021-06-11 11:45:11 +0300325 /*
326 * If the clock provider is not ready yet, let it handle
327 * the re-programming later.
328 */
329 if (ret == -EPROBE_DEFER) {
330 ret = 0;
331 continue;
332 }
333
Philipp Tomsich9cf03b02018-01-08 13:59:18 +0100334 if (ret) {
Sean Andersond7ac3732021-04-08 22:13:03 -0400335 dev_dbg(dev,
336 "could not get assigned clock %d (err = %d)\n",
337 index, ret);
Philipp Tomsich9cf03b02018-01-08 13:59:18 +0100338 continue;
339 }
340
Jean-Jacques Hiblot9601f322019-10-22 14:00:06 +0200341 /* This is clk provider device trying to program itself
342 * It cannot be done right now but need to wait after the
343 * device is probed
344 */
Sean Anderson08d531c2021-06-11 00:16:07 -0400345 if (stage == CLK_DEFAULTS_PRE && clk.dev == dev)
Jean-Jacques Hiblot9601f322019-10-22 14:00:06 +0200346 continue;
347
Sean Anderson08d531c2021-06-11 00:16:07 -0400348 if (stage != CLK_DEFAULTS_PRE && clk.dev != dev)
Jean-Jacques Hiblot9601f322019-10-22 14:00:06 +0200349 /* do not setup twice the parent clocks */
350 continue;
351
Claudiu Bezneab91eee62020-09-07 17:46:36 +0300352 c = clk_set_default_get_by_id(&clk);
353 if (IS_ERR(c))
354 return PTR_ERR(c);
355
356 ret = clk_set_rate(c, rates[index]);
Jean-Jacques Hiblot9601f322019-10-22 14:00:06 +0200357
Philipp Tomsich9cf03b02018-01-08 13:59:18 +0100358 if (ret < 0) {
Sean Andersond7ac3732021-04-08 22:13:03 -0400359 dev_warn(dev,
360 "failed to set rate on clock index %d (%ld) (error = %d)\n",
361 index, clk.id, ret);
Philipp Tomsich9cf03b02018-01-08 13:59:18 +0100362 break;
363 }
364 }
365
366fail:
367 free(rates);
368 return ret;
369}
370
Sean Anderson08d531c2021-06-11 00:16:07 -0400371int clk_set_defaults(struct udevice *dev, enum clk_defaults_stage stage)
Philipp Tomsich9cf03b02018-01-08 13:59:18 +0100372{
373 int ret;
374
Simon Glassf1d50f72020-12-19 10:40:13 -0700375 if (!dev_has_ofnode(dev))
Peng Fan40ec4e42019-07-31 07:01:49 +0000376 return 0;
377
Sean Anderson08d531c2021-06-11 00:16:07 -0400378 /*
379 * To avoid setting defaults twice, don't set them before relocation.
380 * However, still set them for SPL. And still set them if explicitly
381 * asked.
382 */
Philipp Tomsiche546ec82018-11-26 20:20:19 +0100383 if (!(IS_ENABLED(CONFIG_SPL_BUILD) || (gd->flags & GD_FLG_RELOC)))
Sean Anderson08d531c2021-06-11 00:16:07 -0400384 if (stage != CLK_DEFAULTS_POST_FORCE)
385 return 0;
Philipp Tomsiche546ec82018-11-26 20:20:19 +0100386
Philipp Tomsich9cf03b02018-01-08 13:59:18 +0100387 debug("%s(%s)\n", __func__, dev_read_name(dev));
388
Jean-Jacques Hiblot9601f322019-10-22 14:00:06 +0200389 ret = clk_set_default_parents(dev, stage);
Philipp Tomsich9cf03b02018-01-08 13:59:18 +0100390 if (ret)
391 return ret;
392
Jean-Jacques Hiblot9601f322019-10-22 14:00:06 +0200393 ret = clk_set_default_rates(dev, stage);
Philipp Tomsich9cf03b02018-01-08 13:59:18 +0100394 if (ret < 0)
395 return ret;
396
397 return 0;
398}
Stephen Warrena9622432016-06-17 09:44:00 -0600399
400int clk_get_by_name(struct udevice *dev, const char *name, struct clk *clk)
401{
402 int index;
403
404 debug("%s(dev=%p, name=%s, clk=%p)\n", __func__, dev, name, clk);
Patrice Chotard96fc03d2017-07-18 11:57:07 +0200405 clk->dev = NULL;
Stephen Warrena9622432016-06-17 09:44:00 -0600406
Simon Glass2558bff2017-05-30 21:47:29 -0600407 index = dev_read_stringlist_search(dev, "clock-names", name);
Stephen Warrena9622432016-06-17 09:44:00 -0600408 if (index < 0) {
Simon Glassb0ea7402016-10-02 17:59:28 -0600409 debug("fdt_stringlist_search() failed: %d\n", index);
Stephen Warrena9622432016-06-17 09:44:00 -0600410 return index;
411 }
412
413 return clk_get_by_index(dev, index, clk);
Simon Glass0342bd22016-01-20 19:43:02 -0700414}
Giulio Benetti6c910872019-12-12 23:53:19 +0100415# endif /* OF_PLATDATA */
Patrice Chotardcafc3412017-07-25 13:24:45 +0200416
developerbdc786d2020-01-09 11:35:07 +0800417int clk_get_by_name_nodev(ofnode node, const char *name, struct clk *clk)
418{
419 int index;
420
421 debug("%s(node=%p, name=%s, clk=%p)\n", __func__,
422 ofnode_get_name(node), name, clk);
423 clk->dev = NULL;
424
425 index = ofnode_stringlist_search(node, "clock-names", name);
426 if (index < 0) {
427 debug("fdt_stringlist_search() failed: %d\n", index);
428 return index;
429 }
430
431 return clk_get_by_index_nodev(node, index, clk);
432}
433
434int clk_get_optional_nodev(ofnode node, const char *name, struct clk *clk)
435{
436 int ret;
437
438 ret = clk_get_by_name_nodev(node, name, clk);
439 if (ret == -ENODATA)
440 return 0;
441
442 return ret;
443}
444
Patrice Chotardcafc3412017-07-25 13:24:45 +0200445int clk_release_all(struct clk *clk, int count)
446{
447 int i, ret;
448
449 for (i = 0; i < count; i++) {
450 debug("%s(clk[%d]=%p)\n", __func__, i, &clk[i]);
451
452 /* check if clock has been previously requested */
453 if (!clk[i].dev)
454 continue;
455
456 ret = clk_disable(&clk[i]);
457 if (ret && ret != -ENOSYS)
458 return ret;
459
460 ret = clk_free(&clk[i]);
461 if (ret && ret != -ENOSYS)
462 return ret;
463 }
464
465 return 0;
466}
467
Simon Glass589d9152016-07-04 11:58:03 -0600468#endif /* OF_CONTROL */
Stephen Warrena9622432016-06-17 09:44:00 -0600469
470int clk_request(struct udevice *dev, struct clk *clk)
471{
Jean-Jacques Hiblot718039b2019-10-22 14:00:03 +0200472 const struct clk_ops *ops;
Stephen Warrena9622432016-06-17 09:44:00 -0600473
474 debug("%s(dev=%p, clk=%p)\n", __func__, dev, clk);
Jean-Jacques Hiblot718039b2019-10-22 14:00:03 +0200475 if (!clk)
476 return 0;
477 ops = clk_dev_ops(dev);
Stephen Warrena9622432016-06-17 09:44:00 -0600478
479 clk->dev = dev;
480
481 if (!ops->request)
482 return 0;
483
484 return ops->request(clk);
485}
486
487int clk_free(struct clk *clk)
488{
Jean-Jacques Hiblot718039b2019-10-22 14:00:03 +0200489 const struct clk_ops *ops;
Stephen Warrena9622432016-06-17 09:44:00 -0600490
491 debug("%s(clk=%p)\n", __func__, clk);
developerdc338d32020-01-09 11:35:06 +0800492 if (!clk_valid(clk))
Jean-Jacques Hiblot718039b2019-10-22 14:00:03 +0200493 return 0;
494 ops = clk_dev_ops(clk->dev);
Stephen Warrena9622432016-06-17 09:44:00 -0600495
Simon Glass2cdd3f42020-02-03 07:35:54 -0700496 if (!ops->rfree)
Stephen Warrena9622432016-06-17 09:44:00 -0600497 return 0;
498
Simon Glass2cdd3f42020-02-03 07:35:54 -0700499 return ops->rfree(clk);
Stephen Warrena9622432016-06-17 09:44:00 -0600500}
501
502ulong clk_get_rate(struct clk *clk)
503{
Jean-Jacques Hiblot718039b2019-10-22 14:00:03 +0200504 const struct clk_ops *ops;
Simon Glassf73f5812021-01-21 13:57:11 -0700505 int ret;
Stephen Warrena9622432016-06-17 09:44:00 -0600506
507 debug("%s(clk=%p)\n", __func__, clk);
developerdc338d32020-01-09 11:35:06 +0800508 if (!clk_valid(clk))
Jean-Jacques Hiblot718039b2019-10-22 14:00:03 +0200509 return 0;
510 ops = clk_dev_ops(clk->dev);
Stephen Warrena9622432016-06-17 09:44:00 -0600511
512 if (!ops->get_rate)
513 return -ENOSYS;
514
Simon Glassf73f5812021-01-21 13:57:11 -0700515 ret = ops->get_rate(clk);
516 if (ret)
517 return log_ret(ret);
518
519 return 0;
Stephen Warrena9622432016-06-17 09:44:00 -0600520}
521
Lukasz Majewski9e38dc32019-06-24 15:50:42 +0200522struct clk *clk_get_parent(struct clk *clk)
523{
524 struct udevice *pdev;
525 struct clk *pclk;
526
527 debug("%s(clk=%p)\n", __func__, clk);
developerdc338d32020-01-09 11:35:06 +0800528 if (!clk_valid(clk))
Jean-Jacques Hiblot718039b2019-10-22 14:00:03 +0200529 return NULL;
Lukasz Majewski9e38dc32019-06-24 15:50:42 +0200530
531 pdev = dev_get_parent(clk->dev);
Tero Kristof04dfff2021-06-11 11:45:08 +0300532 if (!pdev)
533 return ERR_PTR(-ENODEV);
Lukasz Majewski9e38dc32019-06-24 15:50:42 +0200534 pclk = dev_get_clk_ptr(pdev);
535 if (!pclk)
536 return ERR_PTR(-ENODEV);
537
538 return pclk;
539}
540
Lukasz Majewski53155da2019-06-24 15:50:43 +0200541long long clk_get_parent_rate(struct clk *clk)
542{
543 const struct clk_ops *ops;
544 struct clk *pclk;
545
546 debug("%s(clk=%p)\n", __func__, clk);
developerdc338d32020-01-09 11:35:06 +0800547 if (!clk_valid(clk))
Jean-Jacques Hiblot718039b2019-10-22 14:00:03 +0200548 return 0;
Lukasz Majewski53155da2019-06-24 15:50:43 +0200549
550 pclk = clk_get_parent(clk);
551 if (IS_ERR(pclk))
552 return -ENODEV;
553
554 ops = clk_dev_ops(pclk->dev);
555 if (!ops->get_rate)
556 return -ENOSYS;
557
Lukasz Majewski4ef32172019-06-24 15:50:46 +0200558 /* Read the 'rate' if not already set or if proper flag set*/
559 if (!pclk->rate || pclk->flags & CLK_GET_RATE_NOCACHE)
Lukasz Majewski53155da2019-06-24 15:50:43 +0200560 pclk->rate = clk_get_rate(pclk);
561
562 return pclk->rate;
563}
564
Dario Binacchib7f85892020-12-30 00:06:31 +0100565ulong clk_round_rate(struct clk *clk, ulong rate)
566{
567 const struct clk_ops *ops;
568
569 debug("%s(clk=%p, rate=%lu)\n", __func__, clk, rate);
570 if (!clk_valid(clk))
571 return 0;
572
573 ops = clk_dev_ops(clk->dev);
574 if (!ops->round_rate)
575 return -ENOSYS;
576
577 return ops->round_rate(clk, rate);
578}
579
Tero Kristo9ab78c12021-06-11 11:45:12 +0300580static void clk_clean_rate_cache(struct clk *clk)
581{
582 struct udevice *child_dev;
583 struct clk *clkp;
584
585 if (!clk)
586 return;
587
588 clk->rate = 0;
589
590 list_for_each_entry(child_dev, &clk->dev->child_head, sibling_node) {
591 clkp = dev_get_clk_ptr(child_dev);
592 clk_clean_rate_cache(clkp);
593 }
594}
595
Stephen Warrena9622432016-06-17 09:44:00 -0600596ulong clk_set_rate(struct clk *clk, ulong rate)
597{
Jean-Jacques Hiblot718039b2019-10-22 14:00:03 +0200598 const struct clk_ops *ops;
Stephen Warrena9622432016-06-17 09:44:00 -0600599
600 debug("%s(clk=%p, rate=%lu)\n", __func__, clk, rate);
developerdc338d32020-01-09 11:35:06 +0800601 if (!clk_valid(clk))
Jean-Jacques Hiblot718039b2019-10-22 14:00:03 +0200602 return 0;
603 ops = clk_dev_ops(clk->dev);
Stephen Warrena9622432016-06-17 09:44:00 -0600604
605 if (!ops->set_rate)
606 return -ENOSYS;
607
Tero Kristo9ab78c12021-06-11 11:45:12 +0300608 /* Clean up cached rates for us and all child clocks */
609 clk_clean_rate_cache(clk);
610
Stephen Warrena9622432016-06-17 09:44:00 -0600611 return ops->set_rate(clk, rate);
612}
613
Philipp Tomsichf8e02b22018-01-08 11:15:08 +0100614int clk_set_parent(struct clk *clk, struct clk *parent)
615{
Jean-Jacques Hiblot718039b2019-10-22 14:00:03 +0200616 const struct clk_ops *ops;
Claudiu Bezneac8c16002020-09-07 17:46:34 +0300617 int ret;
Philipp Tomsichf8e02b22018-01-08 11:15:08 +0100618
619 debug("%s(clk=%p, parent=%p)\n", __func__, clk, parent);
developerdc338d32020-01-09 11:35:06 +0800620 if (!clk_valid(clk))
Jean-Jacques Hiblot718039b2019-10-22 14:00:03 +0200621 return 0;
622 ops = clk_dev_ops(clk->dev);
Philipp Tomsichf8e02b22018-01-08 11:15:08 +0100623
624 if (!ops->set_parent)
625 return -ENOSYS;
626
Claudiu Bezneac8c16002020-09-07 17:46:34 +0300627 ret = ops->set_parent(clk, parent);
628 if (ret)
629 return ret;
630
631 if (CONFIG_IS_ENABLED(CLK_CCF))
632 ret = device_reparent(clk->dev, parent->dev);
633
634 return ret;
Philipp Tomsichf8e02b22018-01-08 11:15:08 +0100635}
636
Stephen Warrena9622432016-06-17 09:44:00 -0600637int clk_enable(struct clk *clk)
638{
Jean-Jacques Hiblot718039b2019-10-22 14:00:03 +0200639 const struct clk_ops *ops;
Peng Fan82628e22019-08-21 13:35:09 +0000640 struct clk *clkp = NULL;
641 int ret;
Stephen Warrena9622432016-06-17 09:44:00 -0600642
643 debug("%s(clk=%p)\n", __func__, clk);
developerdc338d32020-01-09 11:35:06 +0800644 if (!clk_valid(clk))
Jean-Jacques Hiblot718039b2019-10-22 14:00:03 +0200645 return 0;
646 ops = clk_dev_ops(clk->dev);
Stephen Warrena9622432016-06-17 09:44:00 -0600647
Peng Fan82628e22019-08-21 13:35:09 +0000648 if (CONFIG_IS_ENABLED(CLK_CCF)) {
649 /* Take id 0 as a non-valid clk, such as dummy */
650 if (clk->id && !clk_get_by_id(clk->id, &clkp)) {
651 if (clkp->enable_count) {
652 clkp->enable_count++;
653 return 0;
654 }
655 if (clkp->dev->parent &&
656 device_get_uclass_id(clkp->dev) == UCLASS_CLK) {
657 ret = clk_enable(dev_get_clk_ptr(clkp->dev->parent));
658 if (ret) {
659 printf("Enable %s failed\n",
660 clkp->dev->parent->name);
661 return ret;
662 }
663 }
664 }
Stephen Warrena9622432016-06-17 09:44:00 -0600665
Peng Fan82628e22019-08-21 13:35:09 +0000666 if (ops->enable) {
667 ret = ops->enable(clk);
668 if (ret) {
669 printf("Enable %s failed\n", clk->dev->name);
670 return ret;
671 }
672 }
673 if (clkp)
674 clkp->enable_count++;
675 } else {
676 if (!ops->enable)
677 return -ENOSYS;
678 return ops->enable(clk);
679 }
680
681 return 0;
Stephen Warrena9622432016-06-17 09:44:00 -0600682}
683
Neil Armstrong8a275a02018-04-03 11:44:18 +0200684int clk_enable_bulk(struct clk_bulk *bulk)
685{
686 int i, ret;
687
688 for (i = 0; i < bulk->count; i++) {
689 ret = clk_enable(&bulk->clks[i]);
690 if (ret < 0 && ret != -ENOSYS)
691 return ret;
692 }
693
694 return 0;
695}
696
Stephen Warrena9622432016-06-17 09:44:00 -0600697int clk_disable(struct clk *clk)
698{
Jean-Jacques Hiblot718039b2019-10-22 14:00:03 +0200699 const struct clk_ops *ops;
Peng Fan82628e22019-08-21 13:35:09 +0000700 struct clk *clkp = NULL;
701 int ret;
Stephen Warrena9622432016-06-17 09:44:00 -0600702
703 debug("%s(clk=%p)\n", __func__, clk);
developerdc338d32020-01-09 11:35:06 +0800704 if (!clk_valid(clk))
Jean-Jacques Hiblot718039b2019-10-22 14:00:03 +0200705 return 0;
706 ops = clk_dev_ops(clk->dev);
Stephen Warrena9622432016-06-17 09:44:00 -0600707
Peng Fan82628e22019-08-21 13:35:09 +0000708 if (CONFIG_IS_ENABLED(CLK_CCF)) {
709 if (clk->id && !clk_get_by_id(clk->id, &clkp)) {
Claudiu Bezneab02e8dd2020-09-07 17:46:35 +0300710 if (clkp->flags & CLK_IS_CRITICAL)
711 return 0;
712
Peng Fan82628e22019-08-21 13:35:09 +0000713 if (clkp->enable_count == 0) {
714 printf("clk %s already disabled\n",
715 clkp->dev->name);
716 return 0;
717 }
Stephen Warrena9622432016-06-17 09:44:00 -0600718
Peng Fan82628e22019-08-21 13:35:09 +0000719 if (--clkp->enable_count > 0)
720 return 0;
721 }
722
723 if (ops->disable) {
724 ret = ops->disable(clk);
725 if (ret)
726 return ret;
727 }
728
729 if (clkp && clkp->dev->parent &&
730 device_get_uclass_id(clkp->dev) == UCLASS_CLK) {
731 ret = clk_disable(dev_get_clk_ptr(clkp->dev->parent));
732 if (ret) {
733 printf("Disable %s failed\n",
734 clkp->dev->parent->name);
735 return ret;
736 }
737 }
738 } else {
739 if (!ops->disable)
740 return -ENOSYS;
741
742 return ops->disable(clk);
743 }
744
745 return 0;
Stephen Warrena9622432016-06-17 09:44:00 -0600746}
Simon Glass36ad2342015-06-23 15:39:15 -0600747
Neil Armstrong8a275a02018-04-03 11:44:18 +0200748int clk_disable_bulk(struct clk_bulk *bulk)
749{
750 int i, ret;
751
752 for (i = 0; i < bulk->count; i++) {
753 ret = clk_disable(&bulk->clks[i]);
754 if (ret < 0 && ret != -ENOSYS)
755 return ret;
756 }
757
758 return 0;
759}
760
Lukasz Majewski12014be2019-06-24 15:50:44 +0200761int clk_get_by_id(ulong id, struct clk **clkp)
762{
763 struct udevice *dev;
764 struct uclass *uc;
765 int ret;
766
767 ret = uclass_get(UCLASS_CLK, &uc);
768 if (ret)
769 return ret;
770
771 uclass_foreach_dev(dev, uc) {
772 struct clk *clk = dev_get_clk_ptr(dev);
773
774 if (clk && clk->id == id) {
775 *clkp = clk;
776 return 0;
777 }
778 }
779
780 return -ENOENT;
781}
782
Sekhar Noricf3119d2019-08-01 19:12:55 +0530783bool clk_is_match(const struct clk *p, const struct clk *q)
784{
785 /* trivial case: identical struct clk's or both NULL */
786 if (p == q)
787 return true;
788
Jean-Jacques Hiblot718039b2019-10-22 14:00:03 +0200789 /* trivial case #2: on the clk pointer is NULL */
790 if (!p || !q)
791 return false;
792
Sekhar Noricf3119d2019-08-01 19:12:55 +0530793 /* same device, id and data */
794 if (p->dev == q->dev && p->id == q->id && p->data == q->data)
795 return true;
796
797 return false;
798}
799
Jean-Jacques Hiblot6e66b2d2019-10-22 14:00:04 +0200800static void devm_clk_release(struct udevice *dev, void *res)
801{
802 clk_free(res);
803}
804
805static int devm_clk_match(struct udevice *dev, void *res, void *data)
806{
807 return res == data;
808}
809
810struct clk *devm_clk_get(struct udevice *dev, const char *id)
811{
812 int rc;
813 struct clk *clk;
814
815 clk = devres_alloc(devm_clk_release, sizeof(struct clk), __GFP_ZERO);
816 if (unlikely(!clk))
817 return ERR_PTR(-ENOMEM);
818
819 rc = clk_get_by_name(dev, id, clk);
820 if (rc)
821 return ERR_PTR(rc);
822
823 devres_add(dev, clk);
824 return clk;
825}
826
827struct clk *devm_clk_get_optional(struct udevice *dev, const char *id)
828{
829 struct clk *clk = devm_clk_get(dev, id);
830
developer5e108fb2020-01-09 11:35:05 +0800831 if (PTR_ERR(clk) == -ENODATA)
Jean-Jacques Hiblot6e66b2d2019-10-22 14:00:04 +0200832 return NULL;
833
834 return clk;
835}
836
837void devm_clk_put(struct udevice *dev, struct clk *clk)
838{
839 int rc;
840
841 if (!clk)
842 return;
843
844 rc = devres_release(dev, devm_clk_release, devm_clk_match, clk);
845 WARN_ON(rc);
846}
847
Jean-Jacques Hiblot9601f322019-10-22 14:00:06 +0200848int clk_uclass_post_probe(struct udevice *dev)
849{
850 /*
851 * when a clock provider is probed. Call clk_set_defaults()
852 * also after the device is probed. This takes care of cases
853 * where the DT is used to setup default parents and rates
854 * using assigned-clocks
855 */
Sean Anderson08d531c2021-06-11 00:16:07 -0400856 clk_set_defaults(dev, CLK_DEFAULTS_POST);
Jean-Jacques Hiblot9601f322019-10-22 14:00:06 +0200857
858 return 0;
859}
860
Simon Glass36ad2342015-06-23 15:39:15 -0600861UCLASS_DRIVER(clk) = {
862 .id = UCLASS_CLK,
863 .name = "clk",
Jean-Jacques Hiblot9601f322019-10-22 14:00:06 +0200864 .post_probe = clk_uclass_post_probe,
Simon Glass36ad2342015-06-23 15:39:15 -0600865};