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Mike Frysinger4752c192008-10-12 21:32:52 -04001/*
2 * U-boot - main board file
3 *
4 * Copyright (c) 2008-2009 Analog Devices Inc.
5 *
6 * Licensed under the GPL-2 or later.
7 */
8
9#include <common.h>
10#include <config.h>
11#include <command.h>
12#include <net.h>
13#include <netdev.h>
14#include <spi.h>
15#include <asm/blackfin.h>
Mike Frysingerc5949182010-06-02 19:29:23 -040016#include <asm/portmux.h>
Mike Frysinger4752c192008-10-12 21:32:52 -040017#include <asm/mach-common/bits/otp.h>
Cliff Caie4638922009-11-20 08:24:43 +000018#include <asm/sdh.h>
Mike Frysinger4752c192008-10-12 21:32:52 -040019
20DECLARE_GLOBAL_DATA_PTR;
21
22int checkboard(void)
23{
24 printf("Board: ADI BF518F EZ-Board board\n");
25 printf(" Support: http://blackfin.uclinux.org/\n");
26 return 0;
27}
28
Mike Frysinger4752c192008-10-12 21:32:52 -040029#if defined(CONFIG_BFIN_MAC)
30static void board_init_enetaddr(uchar *mac_addr)
31{
Mike Frysinger04714b42011-03-17 17:14:14 -040032#ifdef CONFIG_SYS_NO_FLASH
33# define USE_MAC_IN_FLASH 0
34#else
35# define USE_MAC_IN_FLASH 1
36#endif
Mike Frysinger4752c192008-10-12 21:32:52 -040037 bool valid_mac = false;
38
Mike Frysinger04714b42011-03-17 17:14:14 -040039 if (USE_MAC_IN_FLASH) {
40 /* we cram the MAC in the last flash sector */
41 uchar *board_mac_addr = (uchar *)0x203F0096;
Joe Hershberger8ecdbed2015-04-08 01:41:04 -050042 if (is_valid_ethaddr(board_mac_addr)) {
Mike Frysinger04714b42011-03-17 17:14:14 -040043 memcpy(mac_addr, board_mac_addr, 6);
Mike Frysinger4752c192008-10-12 21:32:52 -040044 valid_mac = true;
Mike Frysinger04714b42011-03-17 17:14:14 -040045 }
Mike Frysinger4752c192008-10-12 21:32:52 -040046 }
Mike Frysinger4752c192008-10-12 21:32:52 -040047
48 if (!valid_mac) {
49 puts("Warning: Generating 'random' MAC address\n");
Joe Hershberger8ecdbed2015-04-08 01:41:04 -050050 net_random_ethaddr(mac_addr);
Mike Frysinger4752c192008-10-12 21:32:52 -040051 }
52
53 eth_setenv_enetaddr("ethaddr", mac_addr);
54}
55
Mike Frysingerb361d6c2010-12-03 00:31:48 -050056/* Only the first run of boards had a KSZ switch */
57#if defined(CONFIG_BFIN_SPI) && __SILICON_REVISION__ == 0
58# define KSZ_POSSIBLE 1
59#else
60# define KSZ_POSSIBLE 0
61#endif
62
Graf Yanga211d4b2009-05-05 02:26:27 -040063#define KSZ_MAX_HZ 5000000
64
65#define KSZ_WRITE 0x02
66#define KSZ_READ 0x03
67
Mike Frysinger00136892009-05-29 18:00:16 -040068#define KSZ_REG_CHID 0x00 /* Register 0: Chip ID0 */
Graf Yanga211d4b2009-05-05 02:26:27 -040069#define KSZ_REG_STPID 0x01 /* Register 1: Chip ID1 / Start Switch */
70#define KSZ_REG_GC9 0x0b /* Register 11: Global Control 9 */
71#define KSZ_REG_P3C0 0x30 /* Register 48: Port 3 Control 0 */
72
73static int ksz8893m_transfer(struct spi_slave *slave, uchar dir, uchar reg,
Wolfgang Denkcc474d82009-05-15 22:32:57 +020074 uchar data, uchar result[3])
Graf Yanga211d4b2009-05-05 02:26:27 -040075{
76 unsigned char dout[3] = { dir, reg, data, };
77 return spi_xfer(slave, sizeof(dout) * 8, dout, result, SPI_XFER_BEGIN | SPI_XFER_END);
78}
79
80static int ksz8893m_reg_set(struct spi_slave *slave, uchar reg, uchar data)
81{
82 unsigned char din[3];
83 return ksz8893m_transfer(slave, KSZ_WRITE, reg, data, din);
84}
85
Mike Frysinger00136892009-05-29 18:00:16 -040086static int ksz8893m_reg_read(struct spi_slave *slave, uchar reg)
Graf Yanga211d4b2009-05-05 02:26:27 -040087{
Mike Frysinger00136892009-05-29 18:00:16 -040088 int ret;
Graf Yanga211d4b2009-05-05 02:26:27 -040089 unsigned char din[3];
Mike Frysinger00136892009-05-29 18:00:16 -040090 ret = ksz8893m_transfer(slave, KSZ_READ, reg, 0, din);
91 return ret ? ret : din[2];
92}
Graf Yanga211d4b2009-05-05 02:26:27 -040093
Mike Frysinger00136892009-05-29 18:00:16 -040094static int ksz8893m_reg_clear(struct spi_slave *slave, uchar reg, uchar mask)
95{
96 return ksz8893m_reg_set(slave, reg, ksz8893m_reg_read(slave, reg) & mask);
Graf Yanga211d4b2009-05-05 02:26:27 -040097}
98
99static int ksz8893m_reset(struct spi_slave *slave)
100{
101 int ret = 0;
102
103 /* Disable STPID mode */
104 ret |= ksz8893m_reg_clear(slave, KSZ_REG_GC9, 0x01);
105
106 /* Disable VLAN tag insert on Port3 */
107 ret |= ksz8893m_reg_clear(slave, KSZ_REG_P3C0, 0x04);
108
109 /* Start switch */
110 ret |= ksz8893m_reg_set(slave, KSZ_REG_STPID, 0x01);
111
112 return ret;
113}
114
Mike Frysingerb361d6c2010-12-03 00:31:48 -0500115static bool board_ksz_init(void)
Mike Frysinger4752c192008-10-12 21:32:52 -0400116{
Mike Frysingerb361d6c2010-12-03 00:31:48 -0500117 static bool switch_is_alive = false;
Mike Frysinger4752c192008-10-12 21:32:52 -0400118
119 if (!switch_is_alive) {
Graf Yanga211d4b2009-05-05 02:26:27 -0400120 struct spi_slave *slave = spi_setup_slave(0, 1, KSZ_MAX_HZ, SPI_MODE_3);
Mike Frysinger4752c192008-10-12 21:32:52 -0400121 if (slave) {
122 if (!spi_claim_bus(slave)) {
Mike Frysingerb361d6c2010-12-03 00:31:48 -0500123 bool phy_is_ksz = (ksz8893m_reg_read(slave, KSZ_REG_CHID) == 0x88);
124 int ret = phy_is_ksz ? ksz8893m_reset(slave) : 0;
Mike Frysinger00136892009-05-29 18:00:16 -0400125 switch_is_alive = (ret == 0);
Mike Frysinger4752c192008-10-12 21:32:52 -0400126 spi_release_bus(slave);
127 }
128 spi_free_slave(slave);
129 }
130 }
131
Mike Frysingerb361d6c2010-12-03 00:31:48 -0500132 return switch_is_alive;
133}
134
135int board_eth_init(bd_t *bis)
136{
137 if (KSZ_POSSIBLE) {
138 if (!board_ksz_init())
139 return 0;
140 }
141 return bfin_EMAC_initialize(bis);
Mike Frysinger4752c192008-10-12 21:32:52 -0400142}
143#endif
144
145int misc_init_r(void)
146{
147#ifdef CONFIG_BFIN_MAC
148 uchar enetaddr[6];
149 if (!eth_getenv_enetaddr("ethaddr", enetaddr))
150 board_init_enetaddr(enetaddr);
151#endif
152
Mike Frysinger04714b42011-03-17 17:14:14 -0400153#ifndef CONFIG_SYS_NO_FLASH
154 /* we use the last sector for the MAC address / POST LDR */
155 extern flash_info_t flash_info[];
156 flash_protect(FLAG_PROTECT_SET, 0x203F0000, 0x203FFFFF, &flash_info[0]);
157#endif
158
Mike Frysinger4752c192008-10-12 21:32:52 -0400159 return 0;
160}
Graf Yang55e4b492009-05-24 02:34:34 -0400161
162int board_early_init_f(void)
163{
Mike Frysingerc5949182010-06-02 19:29:23 -0400164 /* connect async banks by default */
165 const unsigned short pins[] = {
166 P_AMS2, P_AMS3, 0,
167 };
168 return peripheral_request_list(pins, "async");
Graf Yang55e4b492009-05-24 02:34:34 -0400169}
Cliff Caie4638922009-11-20 08:24:43 +0000170
171#ifdef CONFIG_BFIN_SDH
172int board_mmc_init(bd_t *bis)
173{
174 return bfin_mmc_init(bis);
175}
176#endif