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Tom Rini10e47792018-05-06 17:58:06 -04001/* SPDX-License-Identifier: GPL-2.0+ */
Heiko Schocherc8f51122010-03-05 07:36:33 +01002/*
3 * Copyright (C) 2010 Heiko Schocher <hs@denx.de>
4 *
5 * based on:
6 * Copyright (C) 2009 Ilya Yanok <yanok@emcraft.com>
Heiko Schocherc8f51122010-03-05 07:36:33 +01007 */
8
9#ifndef __IMX27LITE_COMMON_CONFIG_H
10#define __IMX27LITE_COMMON_CONFIG_H
11
12/*
13 * SoC Configuration
14 */
Heiko Schocherc8f51122010-03-05 07:36:33 +010015#define CONFIG_MX27
16#define CONFIG_MX27_CLK32 32768 /* OSC32K frequency */
Heiko Schocherc8f51122010-03-05 07:36:33 +010017
Heiko Schocherc8f51122010-03-05 07:36:33 +010018#define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */
19#define CONFIG_SETUP_MEMORY_TAGS 1
20#define CONFIG_INITRD_TAG 1
21
22/*
23 * Lowlevel configuration
24 */
25#define SDRAM_ESDCFG_REGISTER_VAL(cas) \
26 (ESDCFG_TRC(10) | \
27 ESDCFG_TRCD(3) | \
28 ESDCFG_TCAS(cas) | \
29 ESDCFG_TRRD(1) | \
30 ESDCFG_TRAS(5) | \
31 ESDCFG_TWR | \
32 ESDCFG_TMRD(2) | \
33 ESDCFG_TRP(2) | \
34 ESDCFG_TXP(3))
35
36#define SDRAM_ESDCTL_REGISTER_VAL \
37 (ESDCTL_PRCT(0) | \
38 ESDCTL_BL | \
39 ESDCTL_PWDT(0) | \
40 ESDCTL_SREFR(3) | \
41 ESDCTL_DSIZ_32 | \
42 ESDCTL_COL10 | \
43 ESDCTL_ROW13 | \
44 ESDCTL_SDE)
45
46#define SDRAM_ALL_VAL 0xf00
47
48#define SDRAM_MODE_REGISTER_VAL 0x33 /* BL: 8, CAS: 3 */
49#define SDRAM_EXT_MODE_REGISTER_VAL 0x1000000
50
51#define MPCTL0_VAL 0x1ef15d5
52
53#define SPCTL0_VAL 0x043a1c09
54
55#define CSCR_VAL 0x33f08107
56
57#define PCDR0_VAL 0x120470c3
58#define PCDR1_VAL 0x03030303
59#define PCCR0_VAL 0xffffffff
60#define PCCR1_VAL 0xfffffffc
61
62#define AIPI1_PSR0_VAL 0x20040304
63#define AIPI1_PSR1_VAL 0xdffbfcfb
64#define AIPI2_PSR0_VAL 0x07ffc200
65#define AIPI2_PSR1_VAL 0xffffffff
66
67/*
68 * Memory Info
69 */
70/* malloc() len */
71#define CONFIG_SYS_MALLOC_LEN (0x10000 + 512 * 1024)
Heiko Schocherc8f51122010-03-05 07:36:33 +010072/* memtest start address */
73#define CONFIG_SYS_MEMTEST_START 0xA0000000
74#define CONFIG_SYS_MEMTEST_END 0xA1000000 /* 16MB RAM test */
Heiko Schocherc8f51122010-03-05 07:36:33 +010075#define PHYS_SDRAM_1 0xA0000000 /* DDR Start */
76#define PHYS_SDRAM_1_SIZE 0x08000000 /* DDR size 128MB */
77
78/*
79 * Serial Driver info
80 */
81#define CONFIG_MXC_UART
Stefano Babic1ca47d92011-11-22 15:22:39 +010082#define CONFIG_MXC_UART_BASE UART1_BASE
Heiko Schocherc8f51122010-03-05 07:36:33 +010083
84/*
85 * Flash & Environment
86 */
Heiko Schocherc8f51122010-03-05 07:36:33 +010087#define CONFIG_FLASH_CFI_DRIVER
88#define CONFIG_SYS_FLASH_CFI
89/* Use buffered writes (~10x faster) */
90#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE 1
91/* Use hardware sector protection */
92#define CONFIG_SYS_FLASH_PROTECTION 1
93#define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of flash banks */
94/* CS2 Base address */
95#define PHYS_FLASH_1 0xc0000000
96/* Flash Base for U-Boot */
97#define CONFIG_SYS_FLASH_BASE PHYS_FLASH_1
98#define CONFIG_SYS_MAX_FLASH_SECT (PHYS_FLASH_SIZE / \
99 CONFIG_SYS_FLASH_SECT_SZ)
100#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE
101#define CONFIG_SYS_MONITOR_LEN 0x40000 /* Reserve 256KiB */
102#define CONFIG_ENV_SIZE CONFIG_ENV_SECT_SIZE
103/* Address and size of Redundant Environment Sector */
104#define CONFIG_ENV_OFFSET_REDUND (CONFIG_ENV_OFFSET + CONFIG_ENV_SIZE)
105#define CONFIG_ENV_SIZE_REDUND CONFIG_ENV_SIZE
106
107/*
108 * Ethernet
109 */
110#define CONFIG_FEC_MXC
111#define CONFIG_FEC_MXC_PHYADDR 0x1f
Heiko Schocherc8f51122010-03-05 07:36:33 +0100112
113/*
114 * MTD
115 */
116#define CONFIG_FLASH_CFI_MTD
Heiko Schocherc8f51122010-03-05 07:36:33 +0100117
118/*
119 * NAND
120 */
Heiko Schocherc8f51122010-03-05 07:36:33 +0100121#define CONFIG_MXC_NAND_REGS_BASE 0xd8000000
122#define CONFIG_SYS_MAX_NAND_DEVICE 1
123#define CONFIG_SYS_NAND_BASE 0xd8000000
124#define CONFIG_JFFS2_NAND
125#define CONFIG_MXC_NAND_HWECC
Heiko Schocherc8f51122010-03-05 07:36:33 +0100126
127/*
Heiko Schocherc8f51122010-03-05 07:36:33 +0100128 * U-Boot general configuration
129 */
Heiko Schocherc8f51122010-03-05 07:36:33 +0100130#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
Heiko Schocherc8f51122010-03-05 07:36:33 +0100131/* Boot Argument Buffer Size */
132#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
Heiko Schocherc8f51122010-03-05 07:36:33 +0100133
Heiko Schocherc8f51122010-03-05 07:36:33 +0100134#define CONFIG_LOADADDR 0xa0800000 /* loadaddr env var */
135#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
136
Heiko Schocherc8f51122010-03-05 07:36:33 +0100137#define CONFIG_EXTRA_ENV_SETTINGS \
138 "netdev=eth0\0" \
139 "nfsargs=setenv bootargs root=/dev/nfs rw " \
140 "nfsroot=${serverip}:${rootpath}\0" \
141 "ramargs=setenv bootargs root=/dev/ram rw\0" \
142 "addip=setenv bootargs ${bootargs} " \
143 "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}" \
144 ":${hostname}:${netdev}:off panic=1\0" \
145 "addtty=setenv bootargs ${bootargs}" \
146 " console=ttymxc0,${baudrate}\0" \
147 "addmtd=setenv bootargs ${bootargs} ${mtdparts}\0" \
148 "addmisc=setenv bootargs ${bootargs}\0" \
Mario Six790d8442018-03-28 14:38:20 +0200149 "u-boot=" CONFIG_HOSTNAME "/u-boot.bin\0" \
Heiko Schocherc8f51122010-03-05 07:36:33 +0100150 "kernel_addr_r=a0800000\0" \
Mario Six790d8442018-03-28 14:38:20 +0200151 "bootfile=" CONFIG_HOSTNAME "/uImage\0" \
Heiko Schocherc8f51122010-03-05 07:36:33 +0100152 "rootpath=/opt/eldk-4.2-arm/arm\0" \
153 "net_nfs=tftp ${kernel_addr_r} ${bootfile};" \
154 "run nfsargs addip addtty addmtd addmisc;" \
155 "bootm\0" \
Marek Vasutfd5ba892012-09-23 17:41:23 +0200156 "bootcmd=run net_nfs\0" \
Heiko Schocherc8f51122010-03-05 07:36:33 +0100157 "load=tftp ${loadaddr} ${u-boot}\0" \
Marek Vasutfd5ba892012-09-23 17:41:23 +0200158 "update=protect off " __stringify(CONFIG_SYS_MONITOR_BASE) \
159 " +${filesize};era " __stringify(CONFIG_SYS_MONITOR_BASE)\
Heiko Schocherc8f51122010-03-05 07:36:33 +0100160 " +${filesize};cp.b ${fileaddr} " \
Marek Vasutfd5ba892012-09-23 17:41:23 +0200161 __stringify(CONFIG_SYS_MONITOR_BASE) " ${filesize}\0" \
Heiko Schocherc8f51122010-03-05 07:36:33 +0100162 "upd=run load update\0" \
Tom Rini5ad8e112017-10-22 17:55:07 -0400163 "mtdids=" CONFIG_MTDIDS_DEFAULT "\0" \
164 "mtdparts=" CONFIG_MTDPARTS_DEFAULT "\0" \
Heiko Schocherc8f51122010-03-05 07:36:33 +0100165
Heiko Schocherd6d60622010-09-22 14:06:33 +0200166/* additions for new relocation code, must be added to all boards */
Heiko Schocher0e2412a2010-09-17 13:10:42 +0200167#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
168#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + 0x1000 - /* Fix this */ \
Wolfgang Denk0191e472010-10-26 14:34:52 +0200169 GENERATED_GBL_DATA_SIZE)
Heiko Schocherc8f51122010-03-05 07:36:33 +0100170#endif /* __IMX27LITE_COMMON_CONFIG_H */