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Tom Rini10e47792018-05-06 17:58:06 -04001/* SPDX-License-Identifier: GPL-2.0+ */
Mingkai Hueee86ff2015-10-26 19:47:52 +08002/*
3 * Copyright (C) 2015 Freescale Semiconductor
Yangbo Lubb32e682021-06-03 10:51:19 +08004 * Copyright 2019-2021 NXP
Mingkai Hueee86ff2015-10-26 19:47:52 +08005 */
6
7#ifndef __LS1043A_COMMON_H
8#define __LS1043A_COMMON_H
9
Sumit Garg2a2857b2017-03-30 09:52:38 +053010/* SPL build */
11#ifdef CONFIG_SPL_BUILD
12#define SPL_NO_FMAN
13#define SPL_NO_DSPI
14#define SPL_NO_PCIE
15#define SPL_NO_ENV
16#define SPL_NO_MISC
17#define SPL_NO_USB
18#define SPL_NO_SATA
19#define SPL_NO_QE
20#define SPL_NO_EEPROM
21#endif
22#if (defined(CONFIG_SPL_BUILD) && defined(CONFIG_NAND_BOOT))
23#define SPL_NO_MMC
24#endif
Yangbo Lu83c4ece2017-09-15 09:51:58 +080025#if (defined(CONFIG_SPL_BUILD) && defined(CONFIG_SD_BOOT_QSPI))
Sumit Garg2a2857b2017-03-30 09:52:38 +053026#define SPL_NO_IFC
27#endif
28
Bharat Bhushan882b6322017-03-22 12:06:27 +053029#include <asm/arch/stream_id_lsch2.h>
Mingkai Hueee86ff2015-10-26 19:47:52 +080030#include <asm/arch/config.h>
Mingkai Hueee86ff2015-10-26 19:47:52 +080031
32/* Link Definitions */
Mingkai Hueee86ff2015-10-26 19:47:52 +080033
Tom Rini6a5dccc2022-11-16 13:10:41 -050034#define CFG_SYS_DDR_SDRAM_BASE 0x80000000
Tom Rini376b88a2022-10-28 20:27:13 -040035#define CFG_SYS_FSL_DDR_SDRAM_BASE_PHY 0
Tom Rini6a5dccc2022-11-16 13:10:41 -050036#define CFG_SYS_SDRAM_BASE CFG_SYS_DDR_SDRAM_BASE
37#define CFG_SYS_DDR_BLOCK2_BASE 0x880000000ULL
Mingkai Hueee86ff2015-10-26 19:47:52 +080038
Michael Wallef056e0f2020-06-01 21:53:26 +020039#define CPU_RELEASE_ADDR secondary_boot_addr
Hou Zhiqiangc7098fa2015-10-26 19:47:57 +080040
Mingkai Hueee86ff2015-10-26 19:47:52 +080041/* Serial Port */
Tom Rinidf6a2152022-11-16 13:10:28 -050042#define CFG_SYS_NS16550_CLK (get_serial_clock())
Mingkai Hueee86ff2015-10-26 19:47:52 +080043
Gong Qianyu8168a0f2015-10-26 19:47:53 +080044/* NAND SPL */
45#ifdef CONFIG_NAND_BOOT
Tom Rinib4213492022-11-12 17:36:51 -050046#define CFG_SYS_NAND_U_BOOT_DST CONFIG_TEXT_BASE
47#define CFG_SYS_NAND_U_BOOT_START CONFIG_TEXT_BASE
Gong Qianyu8168a0f2015-10-26 19:47:53 +080048#endif
49
Biwen Li46de4002021-02-05 19:01:56 +080050/* GPIO */
Biwen Li46de4002021-02-05 19:01:56 +080051
Mingkai Hueee86ff2015-10-26 19:47:52 +080052/* IFC */
Sumit Garg2a2857b2017-03-30 09:52:38 +053053#ifndef SPL_NO_IFC
Rajesh Bhagatb89aed42018-11-05 18:02:44 +000054#if defined(CONFIG_TFABOOT) || \
55 (!defined(CONFIG_QSPI_BOOT) && !defined(CONFIG_SD_BOOT_QSPI))
Mingkai Hueee86ff2015-10-26 19:47:52 +080056/*
Tom Rini6a5dccc2022-11-16 13:10:41 -050057 * CFG_SYS_FLASH_BASE has the final address (core view)
58 * CFG_SYS_FLASH_BASE_PHYS has the final address (IFC view)
59 * CFG_SYS_FLASH_BASE_PHYS_EARLY has the temporary IFC address
Simon Glass72cc5382022-10-20 18:22:39 -060060 * CONFIG_TEXT_BASE is linked to 0x60000000 for booting
Mingkai Hueee86ff2015-10-26 19:47:52 +080061 */
Tom Rini6a5dccc2022-11-16 13:10:41 -050062#define CFG_SYS_FLASH_BASE 0x60000000
63#define CFG_SYS_FLASH_BASE_PHYS CFG_SYS_FLASH_BASE
64#define CFG_SYS_FLASH_BASE_PHYS_EARLY 0x00000000
Gong Qianyu760df892016-01-25 15:16:06 +080065#endif
Sumit Garg2a2857b2017-03-30 09:52:38 +053066#endif
Mingkai Hueee86ff2015-10-26 19:47:52 +080067
68/* I2C */
Mingkai Hueee86ff2015-10-26 19:47:52 +080069
Gong Qianyu51c18dc2016-01-25 15:16:05 +080070/* DSPI */
Gong Qianyu51c18dc2016-01-25 15:16:05 +080071
Shaohui Xie04643262015-10-26 19:47:54 +080072/* FMan ucode */
Sumit Garg2a2857b2017-03-30 09:52:38 +053073#ifndef SPL_NO_FMAN
Shaohui Xie04643262015-10-26 19:47:54 +080074#ifdef CONFIG_SYS_DPAA_FMAN
Tom Rini6a5dccc2022-11-16 13:10:41 -050075#define CFG_SYS_FM_MURAM_SIZE 0x60000
Shaohui Xie04643262015-10-26 19:47:54 +080076#endif
Sumit Garg2a2857b2017-03-30 09:52:38 +053077#endif
Shaohui Xie04643262015-10-26 19:47:54 +080078
Mingkai Hueee86ff2015-10-26 19:47:52 +080079/* Miscellaneous configurable options */
Mingkai Hueee86ff2015-10-26 19:47:52 +080080
Mingkai Hueee86ff2015-10-26 19:47:52 +080081#define HWCONFIG_BUFFER_SIZE 128
82
Sumit Garg2a2857b2017-03-30 09:52:38 +053083#ifndef SPL_NO_MISC
Shengzhou Liu9d662542017-06-08 15:59:48 +080084#define BOOT_TARGET_DEVICES(func) \
85 func(MMC, mmc, 0) \
Mian Yousaf Kaukab6519df72019-01-29 16:38:40 +010086 func(USB, usb, 0) \
87 func(DHCP, dhcp, na)
Shengzhou Liu9d662542017-06-08 15:59:48 +080088#include <config_distro_bootcmd.h>
Shengzhou Liu9d662542017-06-08 15:59:48 +080089
Mingkai Hueee86ff2015-10-26 19:47:52 +080090/* Initial environment variables */
Tom Rinic9edebe2022-12-04 10:03:50 -050091#define CFG_EXTRA_ENV_SETTINGS \
Mingkai Hueee86ff2015-10-26 19:47:52 +080092 "hwconfig=fsl_ddr:bank_intlv=auto\0" \
Mingkai Hueee86ff2015-10-26 19:47:52 +080093 "fdt_high=0xffffffffffffffff\0" \
94 "initrd_high=0xffffffffffffffff\0" \
Vinitha Pillai-B572230c6e10a2017-11-22 10:38:35 +053095 "kernel_addr=0x61000000\0" \
Shengzhou Liu9d662542017-06-08 15:59:48 +080096 "scriptaddr=0x80000000\0" \
Sumit Garg9cbcc4d2017-06-05 23:51:51 +053097 "scripthdraddr=0x80080000\0" \
Shengzhou Liu9d662542017-06-08 15:59:48 +080098 "fdtheader_addr_r=0x80100000\0" \
99 "kernelheader_addr_r=0x80200000\0" \
100 "kernel_addr_r=0x81000000\0" \
Wen He335b3862018-11-20 16:55:25 +0800101 "kernel_start=0x1000000\0" \
102 "kernelheader_start=0x800000\0" \
Shengzhou Liu9d662542017-06-08 15:59:48 +0800103 "fdt_addr_r=0x90000000\0" \
104 "load_addr=0xa0000000\0" \
Manish Tomar8d388012020-11-05 14:08:55 +0530105 "kernelheader_addr=0x60600000\0" \
Qianyu Gong2758edf2016-03-15 16:35:57 +0800106 "kernel_size=0x2800000\0" \
Vinitha Pillai-B572230c6e10a2017-11-22 10:38:35 +0530107 "kernelheader_size=0x40000\0" \
Shengzhou Liu42862752017-11-09 17:57:55 +0800108 "kernel_addr_sd=0x8000\0" \
109 "kernel_size_sd=0x14000\0" \
Manish Tomar8d388012020-11-05 14:08:55 +0530110 "kernelhdr_addr_sd=0x3000\0" \
Vinitha Pillai-B572230c6e10a2017-11-22 10:38:35 +0530111 "kernelhdr_size_sd=0x10\0" \
Shengzhou Liu9d662542017-06-08 15:59:48 +0800112 "console=ttyS0,115200\0" \
York Sunf7eed6b2017-09-28 08:42:16 -0700113 "boot_os=y\0" \
Shengzhou Liu9d662542017-06-08 15:59:48 +0800114 BOOTENV \
115 "boot_scripts=ls1043ardb_boot.scr\0" \
Sumit Garg9cbcc4d2017-06-05 23:51:51 +0530116 "boot_script_hdr=hdr_ls1043ardb_bs.out\0" \
Shengzhou Liu9d662542017-06-08 15:59:48 +0800117 "scan_dev_for_boot_part=" \
118 "part list ${devtype} ${devnum} devplist; " \
119 "env exists devplist || setenv devplist 1; " \
120 "for distro_bootpart in ${devplist}; do " \
121 "if fstype ${devtype} " \
122 "${devnum}:${distro_bootpart} " \
123 "bootfstype; then " \
124 "run scan_dev_for_boot; " \
125 "fi; " \
126 "done\0" \
Sumit Garg9cbcc4d2017-06-05 23:51:51 +0530127 "boot_a_script=" \
128 "load ${devtype} ${devnum}:${distro_bootpart} " \
129 "${scriptaddr} ${prefix}${script}; " \
130 "env exists secureboot && load ${devtype} " \
131 "${devnum}:${distro_bootpart} " \
Vinitha V Pillai25355ec2019-04-23 05:52:17 +0000132 "${scripthdraddr} ${prefix}${boot_script_hdr}; " \
133 "env exists secureboot " \
Sumit Garg9cbcc4d2017-06-05 23:51:51 +0530134 "&& esbc_validate ${scripthdraddr};" \
135 "source ${scriptaddr}\0" \
Shengzhou Liu9d662542017-06-08 15:59:48 +0800136 "qspi_bootcmd=echo Trying load from qspi..;" \
137 "sf probe && sf read $load_addr " \
Wen Hecabe55c2019-11-14 15:08:15 +0800138 "$kernel_start $kernel_size; env exists secureboot " \
139 "&& sf read $kernelheader_addr_r $kernelheader_start " \
Vinitha Pillai-B572230c6e10a2017-11-22 10:38:35 +0530140 "$kernelheader_size && esbc_validate ${kernelheader_addr_r}; " \
141 "bootm $load_addr#$board\0" \
Shengzhou Liu9d662542017-06-08 15:59:48 +0800142 "nor_bootcmd=echo Trying load from nor..;" \
143 "cp.b $kernel_addr $load_addr " \
Vinitha Pillai-B572230c6e10a2017-11-22 10:38:35 +0530144 "$kernel_size; env exists secureboot " \
145 "&& cp.b $kernelheader_addr $kernelheader_addr_r " \
146 "$kernelheader_size && esbc_validate ${kernelheader_addr_r}; " \
147 "bootm $load_addr#$board\0" \
Wen He335b3862018-11-20 16:55:25 +0800148 "nand_bootcmd=echo Trying load from NAND..;" \
149 "nand info; nand read $load_addr " \
150 "$kernel_start $kernel_size; env exists secureboot " \
151 "&& nand read $kernelheader_addr_r $kernelheader_start " \
152 "$kernelheader_size && esbc_validate ${kernelheader_addr_r}; " \
153 "bootm $load_addr#$board\0" \
Shengzhou Liu42862752017-11-09 17:57:55 +0800154 "sd_bootcmd=echo Trying load from SD ..;" \
155 "mmcinfo; mmc read $load_addr " \
156 "$kernel_addr_sd $kernel_size_sd && " \
Vinitha Pillai-B572230c6e10a2017-11-22 10:38:35 +0530157 "env exists secureboot && mmc read $kernelheader_addr_r " \
158 "$kernelhdr_addr_sd $kernelhdr_size_sd " \
159 " && esbc_validate ${kernelheader_addr_r};" \
Shengzhou Liu42862752017-11-09 17:57:55 +0800160 "bootm $load_addr#$board\0"
161
Wenbin Song1738ca72016-07-21 18:55:16 +0800162
Rajesh Bhagatb89aed42018-11-05 18:02:44 +0000163#ifdef CONFIG_TFABOOT
164#define QSPI_NOR_BOOTCOMMAND "run distro_bootcmd; run qspi_bootcmd; " \
165 "env exists secureboot && esbc_halt;"
166#define SD_BOOTCOMMAND "run distro_bootcmd; run sd_bootcmd; " \
167 "env exists secureboot && esbc_halt;"
168#define IFC_NOR_BOOTCOMMAND "run distro_bootcmd; run nor_bootcmd; " \
169 "env exists secureboot && esbc_halt;"
Pankit Garg69210722018-12-27 04:37:53 +0000170#define IFC_NAND_BOOTCOMMAND "run distro_bootcmd; run nand_bootcmd; " \
171 "env exists secureboot && esbc_halt;"
Sumit Garg2a2857b2017-03-30 09:52:38 +0530172#endif
Rajesh Bhagatb89aed42018-11-05 18:02:44 +0000173#endif
Mingkai Hueee86ff2015-10-26 19:47:52 +0800174
Simon Glass89e0a3a2017-05-17 08:23:10 -0600175#include <asm/arch/soc.h>
176
Mingkai Hueee86ff2015-10-26 19:47:52 +0800177#endif /* __LS1043A_COMMON_H */