Patrick Delaunay | 5059914 | 2018-07-09 15:17:19 +0200 | [diff] [blame] | 1 | // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) |
Patrick Delaunay | 06020d8 | 2018-03-12 10:46:17 +0100 | [diff] [blame] | 2 | /* |
| 3 | * Copyright (C) STMicroelectronics 2017 - All Rights Reserved |
| 4 | * Author: Ludovic Barre <ludovic.barre@st.com> for STMicroelectronics. |
| 5 | */ |
Patrick Delaunay | 06020d8 | 2018-03-12 10:46:17 +0100 | [diff] [blame] | 6 | /dts-v1/; |
| 7 | |
Patrick Delaunay | 48c5e90 | 2020-03-06 17:54:41 +0100 | [diff] [blame] | 8 | #include "stm32mp157.dtsi" |
| 9 | #include "stm32mp15xc.dtsi" |
| 10 | #include "stm32mp15-pinctrl.dtsi" |
| 11 | #include "stm32mp15xxaa-pinctrl.dtsi" |
Patrick Delaunay | 06020d8 | 2018-03-12 10:46:17 +0100 | [diff] [blame] | 12 | #include <dt-bindings/gpio/gpio.h> |
Patrick Delaunay | 91be594 | 2019-02-04 11:26:16 +0100 | [diff] [blame] | 13 | #include <dt-bindings/mfd/st,stpmic1.h> |
Patrick Delaunay | 06020d8 | 2018-03-12 10:46:17 +0100 | [diff] [blame] | 14 | |
| 15 | / { |
Patrick Delaunay | 5059914 | 2018-07-09 15:17:19 +0200 | [diff] [blame] | 16 | model = "STMicroelectronics STM32MP157C eval daughter"; |
Patrick Delaunay | 06020d8 | 2018-03-12 10:46:17 +0100 | [diff] [blame] | 17 | compatible = "st,stm32mp157c-ed1", "st,stm32mp157"; |
| 18 | |
| 19 | chosen { |
Patrice Chotard | 00442d0 | 2019-02-12 16:50:38 +0100 | [diff] [blame] | 20 | stdout-path = "serial0:115200n8"; |
Patrick Delaunay | 06020d8 | 2018-03-12 10:46:17 +0100 | [diff] [blame] | 21 | }; |
| 22 | |
Patrick Delaunay | 5059914 | 2018-07-09 15:17:19 +0200 | [diff] [blame] | 23 | memory@c0000000 { |
Patrick Delaunay | a370530 | 2019-07-11 11:15:28 +0200 | [diff] [blame] | 24 | device_type = "memory"; |
Patrick Delaunay | 06020d8 | 2018-03-12 10:46:17 +0100 | [diff] [blame] | 25 | reg = <0xC0000000 0x40000000>; |
| 26 | }; |
Patrice Chotard | f6ef229 | 2018-04-26 17:13:11 +0200 | [diff] [blame] | 27 | |
Patrick Delaunay | 708cae7 | 2019-07-30 19:16:12 +0200 | [diff] [blame] | 28 | reserved-memory { |
| 29 | #address-cells = <1>; |
| 30 | #size-cells = <1>; |
| 31 | ranges; |
| 32 | |
Patrick Delaunay | 8c6e613 | 2019-11-06 16:16:33 +0100 | [diff] [blame] | 33 | mcuram2: mcuram2@10000000 { |
| 34 | compatible = "shared-dma-pool"; |
| 35 | reg = <0x10000000 0x40000>; |
| 36 | no-map; |
| 37 | }; |
| 38 | |
| 39 | vdev0vring0: vdev0vring0@10040000 { |
| 40 | compatible = "shared-dma-pool"; |
| 41 | reg = <0x10040000 0x1000>; |
| 42 | no-map; |
| 43 | }; |
| 44 | |
| 45 | vdev0vring1: vdev0vring1@10041000 { |
| 46 | compatible = "shared-dma-pool"; |
| 47 | reg = <0x10041000 0x1000>; |
| 48 | no-map; |
| 49 | }; |
| 50 | |
| 51 | vdev0buffer: vdev0buffer@10042000 { |
| 52 | compatible = "shared-dma-pool"; |
| 53 | reg = <0x10042000 0x4000>; |
| 54 | no-map; |
| 55 | }; |
| 56 | |
| 57 | mcuram: mcuram@30000000 { |
| 58 | compatible = "shared-dma-pool"; |
| 59 | reg = <0x30000000 0x40000>; |
| 60 | no-map; |
| 61 | }; |
| 62 | |
| 63 | retram: retram@38000000 { |
| 64 | compatible = "shared-dma-pool"; |
| 65 | reg = <0x38000000 0x10000>; |
| 66 | no-map; |
| 67 | }; |
| 68 | |
Patrick Delaunay | 708cae7 | 2019-07-30 19:16:12 +0200 | [diff] [blame] | 69 | gpu_reserved: gpu@e8000000 { |
| 70 | reg = <0xe8000000 0x8000000>; |
| 71 | no-map; |
| 72 | }; |
| 73 | }; |
| 74 | |
Patrice Chotard | 00442d0 | 2019-02-12 16:50:38 +0100 | [diff] [blame] | 75 | aliases { |
| 76 | serial0 = &uart4; |
| 77 | }; |
| 78 | |
Patrice Chotard | f6ef229 | 2018-04-26 17:13:11 +0200 | [diff] [blame] | 79 | sd_switch: regulator-sd_switch { |
| 80 | compatible = "regulator-gpio"; |
| 81 | regulator-name = "sd_switch"; |
| 82 | regulator-min-microvolt = <1800000>; |
| 83 | regulator-max-microvolt = <2900000>; |
| 84 | regulator-type = "voltage"; |
| 85 | regulator-always-on; |
| 86 | |
| 87 | gpios = <&gpiof 14 GPIO_ACTIVE_HIGH>; |
| 88 | gpios-states = <0>; |
Patrick Delaunay | b9c16b7 | 2020-01-28 10:11:00 +0100 | [diff] [blame] | 89 | states = <1800000 0x1>, |
| 90 | <2900000 0x0>; |
Patrice Chotard | f6ef229 | 2018-04-26 17:13:11 +0200 | [diff] [blame] | 91 | }; |
Patrick Delaunay | 6d39705 | 2021-01-11 12:33:36 +0100 | [diff] [blame] | 92 | |
| 93 | vin: vin { |
| 94 | compatible = "regulator-fixed"; |
| 95 | regulator-name = "vin"; |
| 96 | regulator-min-microvolt = <5000000>; |
| 97 | regulator-max-microvolt = <5000000>; |
| 98 | regulator-always-on; |
| 99 | }; |
Patrick Delaunay | 06020d8 | 2018-03-12 10:46:17 +0100 | [diff] [blame] | 100 | }; |
| 101 | |
Patrick Delaunay | 48c5e90 | 2020-03-06 17:54:41 +0100 | [diff] [blame] | 102 | &adc { |
| 103 | /* ANA0, ANA1 are dedicated pins and don't need pinctrl: only in6. */ |
| 104 | pinctrl-0 = <&adc1_in6_pins_a>; |
| 105 | pinctrl-names = "default"; |
| 106 | vdd-supply = <&vdd>; |
| 107 | vdda-supply = <&vdda>; |
| 108 | vref-supply = <&vdda>; |
| 109 | status = "disabled"; |
| 110 | adc1: adc@0 { |
| 111 | st,adc-channels = <0 1 6>; |
| 112 | /* 16.5 ck_cycles sampling time */ |
| 113 | st,min-sample-time-nsecs = <400>; |
| 114 | status = "okay"; |
| 115 | }; |
| 116 | }; |
| 117 | |
Patrick Delaunay | 0e20c1f | 2020-05-25 12:19:42 +0200 | [diff] [blame] | 118 | &cpu0{ |
| 119 | cpu-supply = <&vddcore>; |
| 120 | }; |
| 121 | |
| 122 | &cpu1{ |
| 123 | cpu-supply = <&vddcore>; |
| 124 | }; |
| 125 | |
Patrick Delaunay | 6d39705 | 2021-01-11 12:33:36 +0100 | [diff] [blame] | 126 | &crc1 { |
| 127 | status = "okay"; |
| 128 | }; |
| 129 | |
| 130 | &cryp1 { |
| 131 | status = "okay"; |
| 132 | }; |
| 133 | |
Patrick Delaunay | b9c16b7 | 2020-01-28 10:11:00 +0100 | [diff] [blame] | 134 | &dac { |
| 135 | pinctrl-names = "default"; |
| 136 | pinctrl-0 = <&dac_ch1_pins_a &dac_ch2_pins_a>; |
| 137 | vref-supply = <&vdda>; |
| 138 | status = "disabled"; |
| 139 | dac1: dac@1 { |
| 140 | status = "okay"; |
| 141 | }; |
| 142 | dac2: dac@2 { |
| 143 | status = "okay"; |
| 144 | }; |
| 145 | }; |
| 146 | |
Patrick Delaunay | a370530 | 2019-07-11 11:15:28 +0200 | [diff] [blame] | 147 | &dts { |
Patrick Delaunay | 06020d8 | 2018-03-12 10:46:17 +0100 | [diff] [blame] | 148 | status = "okay"; |
Patrick Delaunay | 06020d8 | 2018-03-12 10:46:17 +0100 | [diff] [blame] | 149 | }; |
| 150 | |
Patrick Delaunay | 708cae7 | 2019-07-30 19:16:12 +0200 | [diff] [blame] | 151 | &gpu { |
| 152 | contiguous-area = <&gpu_reserved>; |
Patrick Delaunay | 708cae7 | 2019-07-30 19:16:12 +0200 | [diff] [blame] | 153 | }; |
| 154 | |
Patrick Delaunay | 6d39705 | 2021-01-11 12:33:36 +0100 | [diff] [blame] | 155 | &hash1 { |
| 156 | status = "okay"; |
| 157 | }; |
| 158 | |
Patrick Delaunay | 06020d8 | 2018-03-12 10:46:17 +0100 | [diff] [blame] | 159 | &i2c4 { |
Patrick Delaunay | df0d20a | 2020-04-30 15:52:46 +0200 | [diff] [blame] | 160 | pinctrl-names = "default", "sleep"; |
Patrick Delaunay | 06020d8 | 2018-03-12 10:46:17 +0100 | [diff] [blame] | 161 | pinctrl-0 = <&i2c4_pins_a>; |
Patrick Delaunay | cdc2ca1 | 2020-07-06 13:26:53 +0200 | [diff] [blame] | 162 | pinctrl-1 = <&i2c4_sleep_pins_a>; |
Patrick Delaunay | 06020d8 | 2018-03-12 10:46:17 +0100 | [diff] [blame] | 163 | i2c-scl-rising-time-ns = <185>; |
| 164 | i2c-scl-falling-time-ns = <20>; |
Patrick Delaunay | df0d20a | 2020-04-30 15:52:46 +0200 | [diff] [blame] | 165 | clock-frequency = <400000>; |
Patrick Delaunay | 06020d8 | 2018-03-12 10:46:17 +0100 | [diff] [blame] | 166 | status = "okay"; |
Patrick Delaunay | a370530 | 2019-07-11 11:15:28 +0200 | [diff] [blame] | 167 | /* spare dmas for other usage */ |
| 168 | /delete-property/dmas; |
| 169 | /delete-property/dma-names; |
Patrick Delaunay | 06020d8 | 2018-03-12 10:46:17 +0100 | [diff] [blame] | 170 | |
Patrick Delaunay | a370530 | 2019-07-11 11:15:28 +0200 | [diff] [blame] | 171 | pmic: stpmic@33 { |
Patrick Delaunay | d79218f | 2019-02-04 11:26:17 +0100 | [diff] [blame] | 172 | compatible = "st,stpmic1"; |
Patrick Delaunay | 06020d8 | 2018-03-12 10:46:17 +0100 | [diff] [blame] | 173 | reg = <0x33>; |
Patrick Delaunay | a370530 | 2019-07-11 11:15:28 +0200 | [diff] [blame] | 174 | interrupts-extended = <&gpioa 0 IRQ_TYPE_EDGE_FALLING>; |
Patrick Delaunay | 06020d8 | 2018-03-12 10:46:17 +0100 | [diff] [blame] | 175 | interrupt-controller; |
| 176 | #interrupt-cells = <2>; |
| 177 | status = "okay"; |
Patrice Chotard | f6ef229 | 2018-04-26 17:13:11 +0200 | [diff] [blame] | 178 | |
Patrice Chotard | f6ef229 | 2018-04-26 17:13:11 +0200 | [diff] [blame] | 179 | regulators { |
Patrick Delaunay | d79218f | 2019-02-04 11:26:17 +0100 | [diff] [blame] | 180 | compatible = "st,stpmic1-regulators"; |
Patrick Delaunay | 6d39705 | 2021-01-11 12:33:36 +0100 | [diff] [blame] | 181 | buck1-supply = <&vin>; |
| 182 | buck2-supply = <&vin>; |
| 183 | buck3-supply = <&vin>; |
| 184 | buck4-supply = <&vin>; |
Patrice Chotard | f6ef229 | 2018-04-26 17:13:11 +0200 | [diff] [blame] | 185 | ldo1-supply = <&v3v3>; |
| 186 | ldo2-supply = <&v3v3>; |
| 187 | ldo3-supply = <&vdd_ddr>; |
Patrick Delaunay | 6d39705 | 2021-01-11 12:33:36 +0100 | [diff] [blame] | 188 | ldo4-supply = <&vin>; |
Patrice Chotard | f6ef229 | 2018-04-26 17:13:11 +0200 | [diff] [blame] | 189 | ldo5-supply = <&v3v3>; |
| 190 | ldo6-supply = <&v3v3>; |
Patrick Delaunay | 6d39705 | 2021-01-11 12:33:36 +0100 | [diff] [blame] | 191 | vref_ddr-supply = <&vin>; |
| 192 | boost-supply = <&vin>; |
Patrice Chotard | f6ef229 | 2018-04-26 17:13:11 +0200 | [diff] [blame] | 193 | pwr_sw1-supply = <&bst_out>; |
| 194 | pwr_sw2-supply = <&bst_out>; |
| 195 | |
| 196 | vddcore: buck1 { |
| 197 | regulator-name = "vddcore"; |
Patrick Delaunay | b9c16b7 | 2020-01-28 10:11:00 +0100 | [diff] [blame] | 198 | regulator-min-microvolt = <1200000>; |
Patrice Chotard | f6ef229 | 2018-04-26 17:13:11 +0200 | [diff] [blame] | 199 | regulator-max-microvolt = <1350000>; |
| 200 | regulator-always-on; |
Patrick Delaunay | a370530 | 2019-07-11 11:15:28 +0200 | [diff] [blame] | 201 | regulator-initial-mode = <0>; |
Patrice Chotard | f6ef229 | 2018-04-26 17:13:11 +0200 | [diff] [blame] | 202 | regulator-over-current-protection; |
Patrice Chotard | f6ef229 | 2018-04-26 17:13:11 +0200 | [diff] [blame] | 203 | }; |
| 204 | |
| 205 | vdd_ddr: buck2 { |
| 206 | regulator-name = "vdd_ddr"; |
| 207 | regulator-min-microvolt = <1350000>; |
| 208 | regulator-max-microvolt = <1350000>; |
| 209 | regulator-always-on; |
Patrick Delaunay | a370530 | 2019-07-11 11:15:28 +0200 | [diff] [blame] | 210 | regulator-initial-mode = <0>; |
Patrice Chotard | f6ef229 | 2018-04-26 17:13:11 +0200 | [diff] [blame] | 211 | regulator-over-current-protection; |
Patrice Chotard | f6ef229 | 2018-04-26 17:13:11 +0200 | [diff] [blame] | 212 | }; |
| 213 | |
| 214 | vdd: buck3 { |
| 215 | regulator-name = "vdd"; |
| 216 | regulator-min-microvolt = <3300000>; |
| 217 | regulator-max-microvolt = <3300000>; |
| 218 | regulator-always-on; |
Patrick Delaunay | a370530 | 2019-07-11 11:15:28 +0200 | [diff] [blame] | 219 | st,mask-reset; |
| 220 | regulator-initial-mode = <0>; |
Patrice Chotard | f6ef229 | 2018-04-26 17:13:11 +0200 | [diff] [blame] | 221 | regulator-over-current-protection; |
Patrice Chotard | f6ef229 | 2018-04-26 17:13:11 +0200 | [diff] [blame] | 222 | }; |
| 223 | |
| 224 | v3v3: buck4 { |
| 225 | regulator-name = "v3v3"; |
| 226 | regulator-min-microvolt = <3300000>; |
| 227 | regulator-max-microvolt = <3300000>; |
Patrick Delaunay | a370530 | 2019-07-11 11:15:28 +0200 | [diff] [blame] | 228 | regulator-always-on; |
Patrice Chotard | f6ef229 | 2018-04-26 17:13:11 +0200 | [diff] [blame] | 229 | regulator-over-current-protection; |
Patrick Delaunay | a370530 | 2019-07-11 11:15:28 +0200 | [diff] [blame] | 230 | regulator-initial-mode = <0>; |
Patrice Chotard | f6ef229 | 2018-04-26 17:13:11 +0200 | [diff] [blame] | 231 | }; |
| 232 | |
| 233 | vdda: ldo1 { |
| 234 | regulator-name = "vdda"; |
| 235 | regulator-min-microvolt = <2900000>; |
| 236 | regulator-max-microvolt = <2900000>; |
| 237 | interrupts = <IT_CURLIM_LDO1 0>; |
Patrice Chotard | f6ef229 | 2018-04-26 17:13:11 +0200 | [diff] [blame] | 238 | }; |
| 239 | |
| 240 | v2v8: ldo2 { |
| 241 | regulator-name = "v2v8"; |
| 242 | regulator-min-microvolt = <2800000>; |
| 243 | regulator-max-microvolt = <2800000>; |
| 244 | interrupts = <IT_CURLIM_LDO2 0>; |
Patrice Chotard | f6ef229 | 2018-04-26 17:13:11 +0200 | [diff] [blame] | 245 | }; |
| 246 | |
| 247 | vtt_ddr: ldo3 { |
| 248 | regulator-name = "vtt_ddr"; |
Patrick Delaunay | a370530 | 2019-07-11 11:15:28 +0200 | [diff] [blame] | 249 | regulator-min-microvolt = <500000>; |
| 250 | regulator-max-microvolt = <750000>; |
Patrice Chotard | f6ef229 | 2018-04-26 17:13:11 +0200 | [diff] [blame] | 251 | regulator-always-on; |
| 252 | regulator-over-current-protection; |
Patrice Chotard | f6ef229 | 2018-04-26 17:13:11 +0200 | [diff] [blame] | 253 | }; |
| 254 | |
| 255 | vdd_usb: ldo4 { |
| 256 | regulator-name = "vdd_usb"; |
Patrice Chotard | f6ef229 | 2018-04-26 17:13:11 +0200 | [diff] [blame] | 257 | interrupts = <IT_CURLIM_LDO4 0>; |
Patrice Chotard | f6ef229 | 2018-04-26 17:13:11 +0200 | [diff] [blame] | 258 | }; |
| 259 | |
| 260 | vdd_sd: ldo5 { |
| 261 | regulator-name = "vdd_sd"; |
| 262 | regulator-min-microvolt = <2900000>; |
| 263 | regulator-max-microvolt = <2900000>; |
| 264 | interrupts = <IT_CURLIM_LDO5 0>; |
Patrice Chotard | f6ef229 | 2018-04-26 17:13:11 +0200 | [diff] [blame] | 265 | regulator-boot-on; |
Patrice Chotard | f6ef229 | 2018-04-26 17:13:11 +0200 | [diff] [blame] | 266 | }; |
| 267 | |
| 268 | v1v8: ldo6 { |
| 269 | regulator-name = "v1v8"; |
| 270 | regulator-min-microvolt = <1800000>; |
| 271 | regulator-max-microvolt = <1800000>; |
| 272 | interrupts = <IT_CURLIM_LDO6 0>; |
Patrice Chotard | f6ef229 | 2018-04-26 17:13:11 +0200 | [diff] [blame] | 273 | }; |
| 274 | |
| 275 | vref_ddr: vref_ddr { |
| 276 | regulator-name = "vref_ddr"; |
| 277 | regulator-always-on; |
Patrice Chotard | f6ef229 | 2018-04-26 17:13:11 +0200 | [diff] [blame] | 278 | }; |
| 279 | |
Patrick Delaunay | c5c9069 | 2019-11-06 16:16:32 +0100 | [diff] [blame] | 280 | bst_out: boost { |
Patrice Chotard | f6ef229 | 2018-04-26 17:13:11 +0200 | [diff] [blame] | 281 | regulator-name = "bst_out"; |
| 282 | interrupts = <IT_OCP_BOOST 0>; |
Patrick Delaunay | c5c9069 | 2019-11-06 16:16:32 +0100 | [diff] [blame] | 283 | }; |
Patrice Chotard | f6ef229 | 2018-04-26 17:13:11 +0200 | [diff] [blame] | 284 | |
| 285 | vbus_otg: pwr_sw1 { |
| 286 | regulator-name = "vbus_otg"; |
| 287 | interrupts = <IT_OCP_OTG 0>; |
Patrice Chotard | f6ef229 | 2018-04-26 17:13:11 +0200 | [diff] [blame] | 288 | }; |
| 289 | |
| 290 | vbus_sw: pwr_sw2 { |
| 291 | regulator-name = "vbus_sw"; |
| 292 | interrupts = <IT_OCP_SWOUT 0>; |
Patrick Delaunay | b9c16b7 | 2020-01-28 10:11:00 +0100 | [diff] [blame] | 293 | regulator-active-discharge = <1>; |
Patrice Chotard | f6ef229 | 2018-04-26 17:13:11 +0200 | [diff] [blame] | 294 | }; |
| 295 | }; |
Patrick Delaunay | a370530 | 2019-07-11 11:15:28 +0200 | [diff] [blame] | 296 | |
| 297 | onkey { |
| 298 | compatible = "st,stpmic1-onkey"; |
| 299 | interrupts = <IT_PONKEY_F 0>, <IT_PONKEY_R 0>; |
| 300 | interrupt-names = "onkey-falling", "onkey-rising"; |
| 301 | power-off-time-sec = <10>; |
| 302 | status = "okay"; |
| 303 | }; |
| 304 | |
| 305 | watchdog { |
| 306 | compatible = "st,stpmic1-wdt"; |
| 307 | status = "disabled"; |
| 308 | }; |
Patrick Delaunay | 06020d8 | 2018-03-12 10:46:17 +0100 | [diff] [blame] | 309 | }; |
| 310 | }; |
| 311 | |
Fabien Dessenne | c2a97d3 | 2019-05-14 11:20:37 +0200 | [diff] [blame] | 312 | &ipcc { |
| 313 | status = "okay"; |
| 314 | }; |
| 315 | |
Patrice Chotard | 00442d0 | 2019-02-12 16:50:38 +0100 | [diff] [blame] | 316 | &iwdg2 { |
| 317 | timeout-sec = <32>; |
| 318 | status = "okay"; |
| 319 | }; |
| 320 | |
Patrick Delaunay | 26c24b4 | 2019-08-02 15:07:18 +0200 | [diff] [blame] | 321 | &m4_rproc { |
Patrick Delaunay | 8c6e613 | 2019-11-06 16:16:33 +0100 | [diff] [blame] | 322 | memory-region = <&retram>, <&mcuram>, <&mcuram2>, <&vdev0vring0>, |
| 323 | <&vdev0vring1>, <&vdev0buffer>; |
Patrick Delaunay | 26c24b4 | 2019-08-02 15:07:18 +0200 | [diff] [blame] | 324 | mboxes = <&ipcc 0>, <&ipcc 1>, <&ipcc 2>; |
| 325 | mbox-names = "vq0", "vq1", "shutdown"; |
Patrick Delaunay | 8c6e613 | 2019-11-06 16:16:33 +0100 | [diff] [blame] | 326 | interrupt-parent = <&exti>; |
| 327 | interrupts = <68 1>; |
Patrick Delaunay | 26c24b4 | 2019-08-02 15:07:18 +0200 | [diff] [blame] | 328 | status = "okay"; |
| 329 | }; |
| 330 | |
Patrick Delaunay | 900494d | 2020-01-28 10:10:59 +0100 | [diff] [blame] | 331 | &pwr_regulators { |
| 332 | vdd-supply = <&vdd>; |
| 333 | vdd_3v3_usbfs-supply = <&vdd_usb>; |
Patrick Delaunay | 5059914 | 2018-07-09 15:17:19 +0200 | [diff] [blame] | 334 | }; |
| 335 | |
Patrice Chotard | 00442d0 | 2019-02-12 16:50:38 +0100 | [diff] [blame] | 336 | &rng1 { |
| 337 | status = "okay"; |
| 338 | }; |
| 339 | |
| 340 | &rtc { |
| 341 | status = "okay"; |
| 342 | }; |
| 343 | |
Patrick Delaunay | 06020d8 | 2018-03-12 10:46:17 +0100 | [diff] [blame] | 344 | &sdmmc1 { |
Patrick Delaunay | a370530 | 2019-07-11 11:15:28 +0200 | [diff] [blame] | 345 | pinctrl-names = "default", "opendrain", "sleep"; |
Patrick Delaunay | 06020d8 | 2018-03-12 10:46:17 +0100 | [diff] [blame] | 346 | pinctrl-0 = <&sdmmc1_b4_pins_a &sdmmc1_dir_pins_a>; |
Patrick Delaunay | a370530 | 2019-07-11 11:15:28 +0200 | [diff] [blame] | 347 | pinctrl-1 = <&sdmmc1_b4_od_pins_a &sdmmc1_dir_pins_a>; |
| 348 | pinctrl-2 = <&sdmmc1_b4_sleep_pins_a &sdmmc1_dir_sleep_pins_a>; |
Patrick Delaunay | df0d20a | 2020-04-30 15:52:46 +0200 | [diff] [blame] | 349 | cd-gpios = <&gpiog 1 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>; |
| 350 | disable-wp; |
Patrice Chotard | 882d72e | 2019-02-12 17:17:58 +0100 | [diff] [blame] | 351 | st,sig-dir; |
| 352 | st,neg-edge; |
| 353 | st,use-ckin; |
Patrick Delaunay | 06020d8 | 2018-03-12 10:46:17 +0100 | [diff] [blame] | 354 | bus-width = <4>; |
Patrice Chotard | f6ef229 | 2018-04-26 17:13:11 +0200 | [diff] [blame] | 355 | vmmc-supply = <&vdd_sd>; |
| 356 | vqmmc-supply = <&sd_switch>; |
Patrick Delaunay | cdc2ca1 | 2020-07-06 13:26:53 +0200 | [diff] [blame] | 357 | sd-uhs-sdr12; |
| 358 | sd-uhs-sdr25; |
| 359 | sd-uhs-sdr50; |
| 360 | sd-uhs-ddr50; |
Patrick Delaunay | 06020d8 | 2018-03-12 10:46:17 +0100 | [diff] [blame] | 361 | status = "okay"; |
| 362 | }; |
| 363 | |
Patrick Delaunay | 8d05010 | 2018-03-20 10:54:52 +0100 | [diff] [blame] | 364 | &sdmmc2 { |
Patrick Delaunay | 2b0bbf5 | 2019-11-06 16:16:34 +0100 | [diff] [blame] | 365 | pinctrl-names = "default", "opendrain", "sleep"; |
Patrick Delaunay | 8d05010 | 2018-03-20 10:54:52 +0100 | [diff] [blame] | 366 | pinctrl-0 = <&sdmmc2_b4_pins_a &sdmmc2_d47_pins_a>; |
Patrick Delaunay | 2b0bbf5 | 2019-11-06 16:16:34 +0100 | [diff] [blame] | 367 | pinctrl-1 = <&sdmmc2_b4_od_pins_a &sdmmc2_d47_pins_a>; |
| 368 | pinctrl-2 = <&sdmmc2_b4_sleep_pins_a &sdmmc2_d47_sleep_pins_a>; |
Patrick Delaunay | 8d05010 | 2018-03-20 10:54:52 +0100 | [diff] [blame] | 369 | non-removable; |
| 370 | no-sd; |
| 371 | no-sdio; |
Patrice Chotard | 882d72e | 2019-02-12 17:17:58 +0100 | [diff] [blame] | 372 | st,neg-edge; |
Patrick Delaunay | 8d05010 | 2018-03-20 10:54:52 +0100 | [diff] [blame] | 373 | bus-width = <8>; |
Patrick Delaunay | 5059914 | 2018-07-09 15:17:19 +0200 | [diff] [blame] | 374 | vmmc-supply = <&v3v3>; |
Patrick Delaunay | df0d20a | 2020-04-30 15:52:46 +0200 | [diff] [blame] | 375 | vqmmc-supply = <&vdd>; |
Patrick Delaunay | 2b0bbf5 | 2019-11-06 16:16:34 +0100 | [diff] [blame] | 376 | mmc-ddr-3_3v; |
Patrick Delaunay | 8d05010 | 2018-03-20 10:54:52 +0100 | [diff] [blame] | 377 | status = "okay"; |
| 378 | }; |
| 379 | |
Patrice Chotard | 00442d0 | 2019-02-12 16:50:38 +0100 | [diff] [blame] | 380 | &timers6 { |
| 381 | status = "okay"; |
Patrick Delaunay | a370530 | 2019-07-11 11:15:28 +0200 | [diff] [blame] | 382 | /* spare dmas for other usage */ |
| 383 | /delete-property/dmas; |
| 384 | /delete-property/dma-names; |
Patrice Chotard | 00442d0 | 2019-02-12 16:50:38 +0100 | [diff] [blame] | 385 | timer@5 { |
| 386 | status = "okay"; |
| 387 | }; |
| 388 | }; |
| 389 | |
Patrick Delaunay | 06020d8 | 2018-03-12 10:46:17 +0100 | [diff] [blame] | 390 | &uart4 { |
Patrick Delaunay | 551efca | 2020-09-16 10:01:32 +0200 | [diff] [blame] | 391 | pinctrl-names = "default", "sleep", "idle"; |
Patrick Delaunay | 06020d8 | 2018-03-12 10:46:17 +0100 | [diff] [blame] | 392 | pinctrl-0 = <&uart4_pins_a>; |
Patrick Delaunay | 551efca | 2020-09-16 10:01:32 +0200 | [diff] [blame] | 393 | pinctrl-1 = <&uart4_sleep_pins_a>; |
| 394 | pinctrl-2 = <&uart4_idle_pins_a>; |
Patrick Delaunay | 06020d8 | 2018-03-12 10:46:17 +0100 | [diff] [blame] | 395 | status = "okay"; |
| 396 | }; |
Patrick Delaunay | 5059914 | 2018-07-09 15:17:19 +0200 | [diff] [blame] | 397 | |
Patrick Delaunay | a370530 | 2019-07-11 11:15:28 +0200 | [diff] [blame] | 398 | &usbotg_hs { |
| 399 | vbus-supply = <&vbus_otg>; |
| 400 | }; |
| 401 | |
Patrick Delaunay | 5059914 | 2018-07-09 15:17:19 +0200 | [diff] [blame] | 402 | &usbphyc_port0 { |
| 403 | phy-supply = <&vdd_usb>; |
Patrick Delaunay | 5059914 | 2018-07-09 15:17:19 +0200 | [diff] [blame] | 404 | }; |
| 405 | |
| 406 | &usbphyc_port1 { |
| 407 | phy-supply = <&vdd_usb>; |
Patrick Delaunay | 5059914 | 2018-07-09 15:17:19 +0200 | [diff] [blame] | 408 | }; |