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Wolfgang Grandegger7789aab22019-05-12 19:25:18 +02001// SPDX-License-Identifier: GPL-2.0+
2/*
3 * U-Boot additions
4 *
5 * Copyright (C) 2015 Marek Vasut <marex@denx.de>
6 * Copyright (C) 2019 Wolfgang Grandegger <wg@aries-embedded.de>
7 */
8
9#include "socfpga-common-u-boot.dtsi"
10
11&watchdog0 {
12 status = "disabled";
13};
14
15&mmc {
Simon Glassd3a98cb2023-02-13 08:56:33 -070016 bootph-all;
Wolfgang Grandegger7789aab22019-05-12 19:25:18 +020017};
18
19&uart0 {
20 clock-frequency = <100000000>;
Simon Glassd3a98cb2023-02-13 08:56:33 -070021 bootph-all;
Wolfgang Grandegger7789aab22019-05-12 19:25:18 +020022};
23
24&porta {
25 bank-name = "porta";
26};
27
28&portb {
29 bank-name = "portb";
30};
31
32&portc {
33 bank-name = "portc";
34};