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Tom Rini53633a82024-02-29 12:33:36 -05001# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2# Copyright (c) 2020 MediaTek
3%YAML 1.2
4---
5$id: http://devicetree.org/schemas/usb/mediatek,mtu3.yaml#
6$schema: http://devicetree.org/meta-schemas/core.yaml#
7
8title: MediaTek USB3 DRD Controller
9
10maintainers:
11 - Chunfeng Yun <chunfeng.yun@mediatek.com>
12
13allOf:
14 - $ref: usb-drd.yaml
15
16description: |
17 The DRD controller has a glue layer IPPC (IP Port Control), and its host is
18 based on xHCI.
19
20properties:
21 compatible:
22 items:
23 - enum:
24 - mediatek,mt2712-mtu3
25 - mediatek,mt8173-mtu3
26 - mediatek,mt8183-mtu3
27 - mediatek,mt8186-mtu3
28 - mediatek,mt8188-mtu3
29 - mediatek,mt8192-mtu3
30 - mediatek,mt8195-mtu3
31 - mediatek,mt8365-mtu3
32 - const: mediatek,mtu3
33
34 reg:
35 items:
36 - description: the registers of device MAC
37 - description: the registers of IP Port Control
38
39 reg-names:
40 items:
41 - const: mac
42 - const: ippc
43
44 interrupts:
45 description:
46 use "interrupts-extended" when the interrupts are connected to the
47 separate interrupt controllers
48 minItems: 1
49 items:
50 - description: SSUSB device controller interrupt
51 - description: optional, wakeup interrupt used to support runtime PM
52
53 interrupt-names:
54 items:
55 - const: device
56 - const: wakeup
57
58 power-domains:
59 description: A phandle to USB power domain node to control USB's MTCMOS
60 maxItems: 1
61
62 clocks:
63 minItems: 1
64 items:
65 - description: Controller clock used by normal mode
66 - description: Reference clock used by low power mode etc
67 - description: Mcu bus clock for register access
68 - description: DMA bus clock for data transfer
69 - description: DRD controller clock
70 - description: Frame count clock
71
72 clock-names:
73 minItems: 1
74 items:
75 - const: sys_ck # required, others are optional
76 - const: ref_ck
77 - const: mcu_ck
78 - const: dma_ck
79 - const: xhci_ck
80 - const: frmcnt_ck
81
82 phys:
83 description:
84 List of all the USB PHYs used, it's better to keep the sequence
85 as the hardware layout.
86 minItems: 1
87 items:
88 - description: USB2/HS PHY # required, others are optional
89 - description: USB3/SS(P) PHY
90 - description: USB2/HS PHY # the following for backward compatible
91 - description: USB3/SS(P) PHY
92 - description: USB2/HS PHY
93 - description: USB3/SS(P) PHY
94 - description: USB2/HS PHY
95 - description: USB3/SS(P) PHY
96 - description: USB2/HS PHY
97
98 vusb33-supply:
99 description: Regulator of USB AVDD3.3v
100
101 vbus-supply:
102 deprecated: true
103 description: |
104 Regulator of USB VBUS5v, needed when supports dual-role mode.
105 Particularly, if use an output GPIO to control a VBUS regulator, should
106 model it as a regulator. See bindings/regulator/fixed-regulator.yaml
107 It's considered valid for compatibility reasons, not allowed for
108 new bindings, and put into a usb-connector node.
109
110 dr_mode:
111 enum: [host, peripheral, otg]
112 default: otg
113
114 maximum-speed:
115 enum: [super-speed-plus, super-speed, high-speed, full-speed]
116
117 resets:
118 maxItems: 1
119
120 "#address-cells":
121 enum: [1, 2]
122
123 "#size-cells":
124 enum: [1, 2]
125
126 ranges: true
127
128 extcon:
129 deprecated: true
130 description: |
131 Phandle to the extcon device detecting the IDDIG state, needed
132 when supports dual-role mode.
133 It's considered valid for compatibility reasons, not allowed for
134 new bindings, and use "usb-role-switch" property instead.
135
136 usb-role-switch:
137 $ref: /schemas/types.yaml#/definitions/flag
138 description: Support role switch.
139 type: boolean
140
141 role-switch-default-mode:
142 enum: [host, peripheral]
143 default: host
144
145 connector:
146 $ref: /schemas/connector/usb-connector.yaml#
147 description:
148 Connector for dual role switch, especially for "gpio-usb-b-connector"
149 type: object
150
151 port:
152 description:
153 Any connector to the data bus of this controller should be modelled
154 using the OF graph bindings specified, if the "usb-role-switch"
155 property is used. See graph.txt
156 $ref: /schemas/graph.yaml#/properties/port
157
158 enable-manual-drd:
159 $ref: /schemas/types.yaml#/definitions/flag
160 description:
161 supports manual dual-role switch via debugfs; usually used when
162 receptacle is TYPE-A and also wants to support dual-role mode.
163 type: boolean
164
165 wakeup-source:
166 description: enable USB remote wakeup, see power/wakeup-source.txt
167 type: boolean
168
169 mediatek,syscon-wakeup:
170 $ref: /schemas/types.yaml#/definitions/phandle-array
171 maxItems: 1
172 description:
173 A phandle to syscon used to access the register of the USB wakeup glue
174 layer between xHCI and SPM, the field should always be 3 cells long.
175 items:
176 items:
177 - description:
178 The first cell represents a phandle to syscon
179 - description:
180 The second cell represents the register base address of the glue
181 layer in syscon
182 - description: |
183 The third cell represents the hardware version of the glue layer,
184 1 - used by mt8173 etc, revision 1 without following IPM rule;
185 2 - used by mt2712 etc, revision 2 with following IPM rule;
186 101 - used by mt8183, specific 1.01;
187 102 - used by mt8192, specific 1.02;
Tom Rini6bb92fc2024-05-20 09:54:58 -0600188 103 - used by mt8195, IP0, specific 1.03;
189 105 - used by mt8195, IP2, specific 1.05;
190 106 - used by mt8195, IP3, specific 1.06;
191 enum: [1, 2, 101, 102, 103, 105, 106]
Tom Rini53633a82024-02-29 12:33:36 -0500192
193 mediatek,u3p-dis-msk:
194 $ref: /schemas/types.yaml#/definitions/uint32
195 description: The mask to disable u3ports, bit0 for u3port0,
196 bit1 for u3port1, ... etc
197
198 mediatek,u2p-dis-msk:
199 $ref: /schemas/types.yaml#/definitions/uint32
200 description: The mask to disable u2ports, bit0 for u2port0,
201 bit1 for u2port1, ... etc; but can't disable u2port0 if dual role mode
202 is enabled, so will be skipped in this case.
203
204# Required child node when support dual-role
205patternProperties:
206 "^usb@[0-9a-f]+$":
207 type: object
208 $ref: /schemas/usb/mediatek,mtk-xhci.yaml#
209 description:
210 The xhci should be added as subnode to mtu3 as shown in the following
211 example if the host mode is enabled.
212
213dependencies:
214 connector: [ usb-role-switch ]
215 port: [ usb-role-switch ]
216 role-switch-default-mode: [ usb-role-switch ]
217 wakeup-source: [ 'mediatek,syscon-wakeup' ]
218
219required:
220 - compatible
221 - reg
222 - reg-names
223 - interrupts
224 - clocks
225 - clock-names
226
227additionalProperties: false
228
229examples:
230 # Dual role switch by extcon
231 - |
232 #include <dt-bindings/clock/mt8173-clk.h>
233 #include <dt-bindings/interrupt-controller/arm-gic.h>
234 #include <dt-bindings/interrupt-controller/irq.h>
235 #include <dt-bindings/phy/phy.h>
236 #include <dt-bindings/power/mt8173-power.h>
237
238 usb@11271000 {
239 compatible = "mediatek,mt8173-mtu3", "mediatek,mtu3";
240 reg = <0x11271000 0x3000>, <0x11280700 0x0100>;
241 reg-names = "mac", "ippc";
242 interrupts = <GIC_SPI 64 IRQ_TYPE_LEVEL_LOW>;
243 phys = <&phy_port0 PHY_TYPE_USB3>, <&phy_port1 PHY_TYPE_USB2>;
244 power-domains = <&scpsys MT8173_POWER_DOMAIN_USB>;
245 clocks = <&topckgen CLK_TOP_USB30_SEL>;
246 clock-names = "sys_ck";
247 vusb33-supply = <&mt6397_vusb_reg>;
248 vbus-supply = <&usb_p0_vbus>;
249 extcon = <&extcon_usb>;
250 dr_mode = "otg";
251 wakeup-source;
252 mediatek,syscon-wakeup = <&pericfg 0x400 1>;
253 #address-cells = <1>;
254 #size-cells = <1>;
255 ranges;
256
257 xhci: usb@11270000 {
258 compatible = "mediatek,mt8173-xhci", "mediatek,mtk-xhci";
259 reg = <0x11270000 0x1000>;
260 reg-names = "mac";
261 interrupts = <GIC_SPI 115 IRQ_TYPE_LEVEL_LOW>;
262 power-domains = <&scpsys MT8173_POWER_DOMAIN_USB>;
263 clocks = <&topckgen CLK_TOP_USB30_SEL>, <&clk26m>;
264 clock-names = "sys_ck", "ref_ck";
265 vusb33-supply = <&mt6397_vusb_reg>;
266 };
267 };
268
269 # Dual role switch by gpio-usb-b-connector
270 - |
271 #include <dt-bindings/gpio/gpio.h>
272 #include <dt-bindings/power/mt2712-power.h>
273
274 usb@112c1000 {
275 compatible = "mediatek,mt2712-mtu3", "mediatek,mtu3";
276 reg = <0x112c1000 0x3000>, <0x112d0700 0x0100>;
277 reg-names = "mac", "ippc";
278 interrupts = <GIC_SPI 248 IRQ_TYPE_LEVEL_LOW>;
279 phys = <&u2port2 PHY_TYPE_USB2>;
280 power-domains = <&scpsys MT2712_POWER_DOMAIN_USB2>;
281 clocks = <&topckgen CLK_TOP_USB30_SEL>;
282 clock-names = "sys_ck";
283 dr_mode = "otg";
284 usb-role-switch;
285 #address-cells = <1>;
286 #size-cells = <1>;
287 ranges;
288
289 host0: usb@11270000 {
290 compatible = "mediatek,mt2712-xhci", "mediatek,mtk-xhci";
291 reg = <0x11270000 0x1000>;
292 reg-names = "mac";
293 interrupts = <GIC_SPI 123 IRQ_TYPE_LEVEL_LOW>;
294 power-domains = <&scpsys MT2712_POWER_DOMAIN_USB>;
295 clocks = <&topckgen CLK_TOP_USB30_SEL>, <&clk26m>;
296 clock-names = "sys_ck", "ref_ck";
297 };
298
299 connector {
300 compatible = "gpio-usb-b-connector", "usb-b-connector";
301 type = "micro";
302 id-gpios = <&pio 12 GPIO_ACTIVE_HIGH>;
303 vbus-supply = <&usb_p0_vbus>;
304 };
305 };
306
307 # Dual role switch with type-c
308 - |
309 usb@11201000 {
310 compatible = "mediatek,mt8183-mtu3", "mediatek,mtu3";
311 reg = <0x11201000 0x2e00>, <0x11203e00 0x0100>;
312 reg-names = "mac", "ippc";
313 interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_LOW>;
314 phys = <&u2port0 PHY_TYPE_USB2>;
315 clocks = <&clk26m>;
316 clock-names = "sys_ck";
317 mediatek,syscon-wakeup = <&pericfg 0x400 1>;
318 wakeup-source;
319 dr_mode = "otg";
320 usb-role-switch;
321 role-switch-default-mode = "host";
322 #address-cells = <1>;
323 #size-cells = <1>;
324 ranges;
325
326 host: usb@11200000 {
327 compatible = "mediatek,mt8183-xhci", "mediatek,mtk-xhci";
328 reg = <0x11200000 0x1000>;
329 reg-names = "mac";
330 interrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_LOW>;
331 clocks = <&clk26m>;
332 clock-names = "sys_ck";
333 };
334
335 port {
336 usb_role_sw: endpoint {
337 remote-endpoint = <&hs_ep>;
338 };
339 };
340 };
341
342...