blob: c99274d2a9bd608f55e4b1d626afa61dfb8e1e9a [file] [log] [blame]
Tom Rini53633a82024-02-29 12:33:36 -05001# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/clock/amlogic,a1-pll-clkc.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Amlogic A1 PLL Clock Control Unit
8
9maintainers:
10 - Neil Armstrong <neil.armstrong@linaro.org>
11 - Jerome Brunet <jbrunet@baylibre.com>
12 - Jian Hu <jian.hu@jian.hu.com>
13 - Dmitry Rokosov <ddrokosov@sberdevices.ru>
14
15properties:
16 compatible:
17 const: amlogic,a1-pll-clkc
18
19 '#clock-cells':
20 const: 1
21
22 reg:
23 maxItems: 1
24
25 clocks:
26 items:
27 - description: input fixpll_in
28 - description: input hifipll_in
Tom Rini6b642ac2024-10-01 12:20:28 -060029 - description: input syspll_in
30 minItems: 2 # syspll_in is optional
Tom Rini53633a82024-02-29 12:33:36 -050031
32 clock-names:
33 items:
34 - const: fixpll_in
35 - const: hifipll_in
Tom Rini6b642ac2024-10-01 12:20:28 -060036 - const: syspll_in
37 minItems: 2 # syspll_in is optional
Tom Rini53633a82024-02-29 12:33:36 -050038
39required:
40 - compatible
41 - '#clock-cells'
42 - reg
43 - clocks
44 - clock-names
45
46additionalProperties: false
47
48examples:
49 - |
50 #include <dt-bindings/clock/amlogic,a1-peripherals-clkc.h>
51 apb {
52 #address-cells = <2>;
53 #size-cells = <2>;
54
55 clock-controller@7c80 {
56 compatible = "amlogic,a1-pll-clkc";
57 reg = <0 0x7c80 0 0x18c>;
58 #clock-cells = <1>;
59 clocks = <&clkc_periphs CLKID_FIXPLL_IN>,
Tom Rini6b642ac2024-10-01 12:20:28 -060060 <&clkc_periphs CLKID_HIFIPLL_IN>,
61 <&clkc_periphs CLKID_SYSPLL_IN>;
62 clock-names = "fixpll_in", "hifipll_in", "syspll_in";
Tom Rini53633a82024-02-29 12:33:36 -050063 };
64 };