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Michal Simek2e53eb22022-09-19 14:21:02 +02001# SPDX-License-Identifier: GPL-2.0
2
3if ARCH_VERSAL_NET
4
5config SYS_BOARD
6 string "Board name"
7 default "versal-net"
8
9config SYS_VENDOR
10 string "Vendor name"
11 default "xilinx"
12
13config SYS_SOC
14 default "versal-net"
15
Ashok Reddy Soma81627322023-01-10 08:44:07 +010016config COUNTER_FREQUENCY
17 int "Timer clock frequency"
18 default 0
19 help
20 Setup time clock frequency for certain platform
21
22config IOU_SWITCH_DIVISOR0
23 hex "IOU switch divisor0"
24 default 0x20
25 help
26 Setup time clock divisor for input clock.
27
Michal Simek2e53eb22022-09-19 14:21:02 +020028config SYS_MEM_RSVD_FOR_MMU
29 bool "Reserve memory for MMU Table"
30 help
31 If defined this option is used to setup different space for
32 MMU table than the one which will be allocated during
33 relocation.
34
35config GICV3
36 def_bool y
37
Venkatesh Yadav Abbarapuda023da2024-03-06 16:54:41 +053038config GICV3_SUPPORT_GIC600
39 def_bool y
40
Michal Simek2e53eb22022-09-19 14:21:02 +020041config SYS_MALLOC_LEN
42 default 0x2000000
43
44config ZYNQ_SDHCI_MAX_FREQ
45 default 200000000
46
47source "board/xilinx/Kconfig"
48source "board/xilinx/versal-net/Kconfig"
49
50endif