| Ryan Chen | 906ab4d | 2020-08-31 14:03:05 +0800 | [diff] [blame] | 1 | // SPDX-License-Identifier: GPL-2.0 |
| maxims@google.com | 2d5a2ad | 2017-01-18 13:44:56 -0800 | [diff] [blame] | 2 | |
| Ryan Chen | 1e4a5c1 | 2020-08-31 14:03:04 +0800 | [diff] [blame] | 3 | #define ASPEED_CLK_GATE_ECLK 0 |
| 4 | #define ASPEED_CLK_GATE_GCLK 1 |
| 5 | #define ASPEED_CLK_GATE_MCLK 2 |
| 6 | #define ASPEED_CLK_GATE_VCLK 3 |
| 7 | #define ASPEED_CLK_GATE_BCLK 4 |
| 8 | #define ASPEED_CLK_GATE_DCLK 5 |
| 9 | #define ASPEED_CLK_GATE_REFCLK 6 |
| 10 | #define ASPEED_CLK_GATE_USBPORT2CLK 7 |
| 11 | #define ASPEED_CLK_GATE_LCLK 8 |
| 12 | #define ASPEED_CLK_GATE_USBUHCICLK 9 |
| 13 | #define ASPEED_CLK_GATE_D1CLK 10 |
| 14 | #define ASPEED_CLK_GATE_YCLK 11 |
| 15 | #define ASPEED_CLK_GATE_USBPORT1CLK 12 |
| 16 | #define ASPEED_CLK_GATE_UART1CLK 13 |
| 17 | #define ASPEED_CLK_GATE_UART2CLK 14 |
| 18 | #define ASPEED_CLK_GATE_UART5CLK 15 |
| 19 | #define ASPEED_CLK_GATE_ESPICLK 16 |
| 20 | #define ASPEED_CLK_GATE_MAC1CLK 17 |
| 21 | #define ASPEED_CLK_GATE_MAC2CLK 18 |
| 22 | #define ASPEED_CLK_GATE_RSACLK 19 |
| 23 | #define ASPEED_CLK_GATE_UART3CLK 20 |
| 24 | #define ASPEED_CLK_GATE_UART4CLK 21 |
| 25 | #define ASPEED_CLK_GATE_SDCLK 22 |
| 26 | #define ASPEED_CLK_GATE_LHCCLK 23 |
| 27 | #define ASPEED_CLK_HPLL 24 |
| 28 | #define ASPEED_CLK_AHB 25 |
| 29 | #define ASPEED_CLK_APB 26 |
| 30 | #define ASPEED_CLK_UART 27 |
| 31 | #define ASPEED_CLK_SDIO 28 |
| 32 | #define ASPEED_CLK_ECLK 29 |
| 33 | #define ASPEED_CLK_ECLK_MUX 30 |
| 34 | #define ASPEED_CLK_LHCLK 31 |
| 35 | #define ASPEED_CLK_MAC 32 |
| 36 | #define ASPEED_CLK_BCLK 33 |
| 37 | #define ASPEED_CLK_MPLL 34 |
| 38 | #define ASPEED_CLK_24M 35 |
| 39 | #define ASPEED_CLK_MAC1RCLK 36 |
| 40 | #define ASPEED_CLK_MAC2RCLK 37 |
| 41 | #define ASPEED_CLK_DPLL 38 |
| 42 | #define ASPEED_CLK_D2PLL 39 |