Tom Rini | 10e4779 | 2018-05-06 17:58:06 -0400 | [diff] [blame] | 1 | // SPDX-License-Identifier: GPL-2.0+ |
TsiChungLiew | b859ef1 | 2007-08-16 19:23:50 -0500 | [diff] [blame] | 2 | /* |
| 3 | * |
Alison Wang | d132fe6 | 2012-03-26 21:49:06 +0000 | [diff] [blame] | 4 | * Copyright (C) 2004-2007, 2012 Freescale Semiconductor, Inc. |
TsiChungLiew | b859ef1 | 2007-08-16 19:23:50 -0500 | [diff] [blame] | 5 | * TsiChung Liew (Tsi-Chung.Liew@freescale.com) |
TsiChungLiew | b859ef1 | 2007-08-16 19:23:50 -0500 | [diff] [blame] | 6 | */ |
| 7 | |
| 8 | /* CPU specific interrupt routine */ |
| 9 | #include <common.h> |
| 10 | #include <asm/immap.h> |
Alison Wang | d132fe6 | 2012-03-26 21:49:06 +0000 | [diff] [blame] | 11 | #include <asm/io.h> |
TsiChungLiew | b859ef1 | 2007-08-16 19:23:50 -0500 | [diff] [blame] | 12 | |
| 13 | int interrupt_init(void) |
| 14 | { |
Alison Wang | d132fe6 | 2012-03-26 21:49:06 +0000 | [diff] [blame] | 15 | int0_t *intp = (int0_t *) (CONFIG_SYS_INTR_BASE); |
TsiChungLiew | b859ef1 | 2007-08-16 19:23:50 -0500 | [diff] [blame] | 16 | |
| 17 | /* Make sure all interrupts are disabled */ |
Alison Wang | d132fe6 | 2012-03-26 21:49:06 +0000 | [diff] [blame] | 18 | setbits_be32(&intp->imrl0, 0x1); |
TsiChungLiew | b859ef1 | 2007-08-16 19:23:50 -0500 | [diff] [blame] | 19 | |
| 20 | enable_interrupts(); |
| 21 | return 0; |
| 22 | } |
| 23 | |
| 24 | #if defined(CONFIG_MCFTMR) |
| 25 | void dtimer_intr_setup(void) |
| 26 | { |
Alison Wang | d132fe6 | 2012-03-26 21:49:06 +0000 | [diff] [blame] | 27 | int0_t *intp = (int0_t *) (CONFIG_SYS_INTR_BASE); |
TsiChungLiew | b859ef1 | 2007-08-16 19:23:50 -0500 | [diff] [blame] | 28 | |
Alison Wang | d132fe6 | 2012-03-26 21:49:06 +0000 | [diff] [blame] | 29 | out_8(&intp->icr0[CONFIG_SYS_TMRINTR_NO], CONFIG_SYS_TMRINTR_PRI); |
| 30 | clrbits_be32(&intp->imrl0, INTC_IPRL_INT0); |
| 31 | clrbits_be32(&intp->imrl0, CONFIG_SYS_TMRINTR_MASK); |
TsiChungLiew | b859ef1 | 2007-08-16 19:23:50 -0500 | [diff] [blame] | 32 | } |
| 33 | #endif |