wdenk | 5f49575 | 2004-02-26 23:46:20 +0000 | [diff] [blame] | 1 | /*********************************************************************** |
| 2 | * |
| 3 | * Copyright (C) 2004 by FS Forth-Systeme GmbH. |
| 4 | * All rights reserved. |
| 5 | * |
| 6 | * $Id: ns9750_serial.c,v 1.1 2004/02/16 10:37:20 mpietrek Exp $ |
| 7 | * @Author: Markus Pietrek |
| 8 | * @Descr: Serial driver for the NS9750. Only one UART is supported yet. |
| 9 | * @References: [1] NS9750 Hardware Reference/December 2003 |
| 10 | * @TODO: Implement Character GAP Timer when chip is fixed for PLL bypass |
| 11 | * |
| 12 | * This program is free software; you can redistribute it and/or |
| 13 | * modify it under the terms of the GNU General Public License as |
| 14 | * published by the Free Software Foundation; either version 2 of |
| 15 | * the License, or (at your option) any later version. |
| 16 | * |
| 17 | * This program is distributed in the hope that it will be useful, |
| 18 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 19 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 20 | * GNU General Public License for more details. |
| 21 | * |
| 22 | * You should have received a copy of the GNU General Public License |
| 23 | * along with this program; if not, write to the Free Software |
| 24 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, |
| 25 | * MA 02111-1307 USA |
| 26 | * |
| 27 | ***********************************************************************/ |
| 28 | |
| 29 | #include <common.h> |
| 30 | |
| 31 | #ifdef CFG_NS9750_UART |
| 32 | |
| 33 | #include "ns9750_bbus.h" /* for GPIOs */ |
| 34 | #include "ns9750_ser.h" /* for serial configuration */ |
| 35 | |
Wolfgang Denk | 6405a15 | 2006-03-31 18:32:53 +0200 | [diff] [blame] | 36 | DECLARE_GLOBAL_DATA_PTR; |
| 37 | |
wdenk | 5f49575 | 2004-02-26 23:46:20 +0000 | [diff] [blame] | 38 | #define CONSOLE CONFIG_CONS_INDEX |
| 39 | |
| 40 | static unsigned int calcBitrateRegister( void ); |
| 41 | static unsigned int calcRxCharGapRegister( void ); |
| 42 | |
| 43 | static char cCharsAvailable; /* Numbers of chars in unCharCache */ |
| 44 | static unsigned int unCharCache; /* unCharCache is only valid if |
| 45 | * cCharsAvailable > 0 */ |
| 46 | |
| 47 | /*********************************************************************** |
| 48 | * @Function: serial_init |
| 49 | * @Return: 0 |
| 50 | * @Descr: configures GPIOs and UART. Requires BBUS Master Reset turned off |
| 51 | ***********************************************************************/ |
| 52 | |
| 53 | int serial_init( void ) |
| 54 | { |
| 55 | unsigned int aunGPIOTxD[] = { 0, 8, 40, 44 }; |
| 56 | unsigned int aunGPIORxD[] = { 1, 9, 41, 45 }; |
| 57 | |
| 58 | cCharsAvailable = 0; |
| 59 | |
| 60 | /* configure TxD and RxD pins for their special function */ |
| 61 | set_gpio_cfg_reg_val( aunGPIOTxD[ CONSOLE ], |
| 62 | NS9750_GPIO_CFG_FUNC_0 | NS9750_GPIO_CFG_OUTPUT ); |
| 63 | set_gpio_cfg_reg_val( aunGPIORxD[ CONSOLE ], |
| 64 | NS9750_GPIO_CFG_FUNC_0 | NS9750_GPIO_CFG_INPUT ); |
| 65 | |
| 66 | /* configure serial engine */ |
| 67 | *get_ser_reg_addr_channel( NS9750_SER_CTRL_A, CONSOLE ) = |
| 68 | NS9750_SER_CTRL_A_CE | |
| 69 | NS9750_SER_CTRL_A_STOP | |
| 70 | NS9750_SER_CTRL_A_WLS_8; |
| 71 | |
| 72 | serial_setbrg(); |
| 73 | |
| 74 | *get_ser_reg_addr_channel( NS9750_SER_CTRL_B, CONSOLE ) = |
| 75 | NS9750_SER_CTRL_B_RCGT; |
| 76 | |
| 77 | return 0; |
| 78 | } |
| 79 | |
| 80 | /*********************************************************************** |
| 81 | * @Function: serial_putc |
| 82 | * @Return: n/a |
| 83 | * @Descr: writes one character to the FIFO. Blocks until FIFO is not full |
| 84 | ***********************************************************************/ |
| 85 | |
| 86 | void serial_putc( const char c ) |
| 87 | { |
| 88 | if (c == '\n') |
| 89 | serial_putc( '\r' ); |
| 90 | |
| 91 | while (!(*get_ser_reg_addr_channel( NS9750_SER_STAT_A, CONSOLE) & |
| 92 | NS9750_SER_STAT_A_TRDY ) ) { |
| 93 | /* do nothing, wait for characters in FIFO sent */ |
| 94 | } |
| 95 | |
| 96 | *(volatile char*) get_ser_reg_addr_channel( NS9750_SER_FIFO, |
| 97 | CONSOLE) = c; |
| 98 | } |
| 99 | |
| 100 | /*********************************************************************** |
| 101 | * @Function: serial_puts |
| 102 | * @Return: n/a |
| 103 | * @Descr: writes non-zero string to the FIFO. |
| 104 | ***********************************************************************/ |
| 105 | |
| 106 | void serial_puts( const char *s ) |
| 107 | { |
| 108 | while (*s) { |
| 109 | serial_putc( *s++ ); |
| 110 | } |
| 111 | } |
| 112 | |
| 113 | /*********************************************************************** |
| 114 | * @Function: serial_getc |
| 115 | * @Return: the character read |
| 116 | * @Descr: performs only 8bit accesses to the FIFO. No error handling |
| 117 | ***********************************************************************/ |
| 118 | |
| 119 | int serial_getc( void ) |
| 120 | { |
| 121 | int i; |
| 122 | |
| 123 | while (!serial_tstc() ) { |
| 124 | /* do nothing, wait for incoming characters */ |
| 125 | } |
| 126 | |
| 127 | /* at least one character in unCharCache */ |
| 128 | i = (int) (unCharCache & 0xff); |
| 129 | |
| 130 | unCharCache >>= 8; |
| 131 | cCharsAvailable--; |
| 132 | |
| 133 | return i; |
| 134 | } |
| 135 | |
| 136 | /*********************************************************************** |
| 137 | * @Function: serial_tstc |
| 138 | * @Return: 0 if no input available, otherwise != 0 |
| 139 | * @Descr: checks for incoming FIFO not empty. Stores the incoming chars in |
| 140 | * unCharCache and the numbers of characters in cCharsAvailable |
| 141 | ***********************************************************************/ |
| 142 | |
| 143 | int serial_tstc( void ) |
| 144 | { |
| 145 | unsigned int unRegCache; |
| 146 | |
| 147 | if ( cCharsAvailable ) |
| 148 | return 1; |
| 149 | |
| 150 | unRegCache = *get_ser_reg_addr_channel( NS9750_SER_STAT_A,CONSOLE ); |
| 151 | if( unRegCache & NS9750_SER_STAT_A_RBC ) { |
| 152 | *get_ser_reg_addr_channel( NS9750_SER_STAT_A, CONSOLE ) = |
| 153 | NS9750_SER_STAT_A_RBC; |
| 154 | unRegCache = *get_ser_reg_addr_channel( NS9750_SER_STAT_A, |
| 155 | CONSOLE ); |
| 156 | } |
| 157 | |
| 158 | if ( unRegCache & NS9750_SER_STAT_A_RRDY ) { |
| 159 | cCharsAvailable = (unRegCache & NS9750_SER_STAT_A_RXFDB_MA)>>20; |
| 160 | if ( !cCharsAvailable ) |
| 161 | cCharsAvailable = 4; |
| 162 | |
| 163 | unCharCache = *get_ser_reg_addr_channel( NS9750_SER_FIFO, |
| 164 | CONSOLE ); |
| 165 | return 1; |
| 166 | } |
| 167 | |
| 168 | /* no chars available */ |
| 169 | return 0; |
| 170 | } |
| 171 | |
| 172 | void serial_setbrg( void ) |
| 173 | { |
| 174 | *get_ser_reg_addr_channel( NS9750_SER_BITRATE, CONSOLE ) = |
| 175 | calcBitrateRegister(); |
| 176 | *get_ser_reg_addr_channel( NS9750_SER_RX_CHAR_TIMER, CONSOLE ) = |
| 177 | calcRxCharGapRegister(); |
| 178 | } |
| 179 | |
| 180 | /*********************************************************************** |
| 181 | * @Function: calcBitrateRegister |
| 182 | * @Return: value for the serial bitrate register |
| 183 | * @Descr: register value depends on clock frequency and baudrate |
| 184 | ***********************************************************************/ |
| 185 | |
| 186 | static unsigned int calcBitrateRegister( void ) |
| 187 | { |
wdenk | 5f49575 | 2004-02-26 23:46:20 +0000 | [diff] [blame] | 188 | return ( NS9750_SER_BITRATE_EBIT | |
| 189 | NS9750_SER_BITRATE_CLKMUX_BCLK | |
| 190 | NS9750_SER_BITRATE_TMODE | |
| 191 | NS9750_SER_BITRATE_TCDR_16 | |
| 192 | NS9750_SER_BITRATE_RCDR_16 | |
| 193 | ( ( ( ( CONFIG_SYS_CLK_FREQ / 8 ) / /* BBUS clock,[1] Fig. 38 */ |
| 194 | ( gd->baudrate * 16 ) ) - 1 ) & |
| 195 | NS9750_SER_BITRATE_N_MA ) ); |
| 196 | } |
| 197 | |
| 198 | /*********************************************************************** |
| 199 | * @Function: calcRxCharGapRegister |
| 200 | * @Return: value for the character gap timer register |
| 201 | * @Descr: register value depends on clock frequency and baudrate. Currently 0 |
| 202 | * is used as there is a bug with the gap timer in PLL bypass mode. |
| 203 | ***********************************************************************/ |
| 204 | |
| 205 | static unsigned int calcRxCharGapRegister( void ) |
| 206 | { |
wdenk | 5f49575 | 2004-02-26 23:46:20 +0000 | [diff] [blame] | 207 | return NS9750_SER_RX_CHAR_TIMER_TRUN; |
| 208 | } |
| 209 | |
| 210 | #endif /* CFG_NS9750_UART */ |