blob: 3ad3aefa7559e03287d4dd63dd0edf41e1d6e129 [file] [log] [blame]
Chris Packham67b7d502022-11-05 17:24:00 +13001/* SPDX-License-Identifier: GPL-2.0+ */
2/*
3 * Copyright (C) 2018 Marvell International Ltd
4 */
5
6#ifndef _CONFIG_MVEBU_ALLEYCAY_5_H
7#define _CONFIG_MVEBU_ALLEYCAY_5_H
8
9#include <asm/arch/soc.h>
10
11/* additions for new ARM relocation support */
Tom Rinibb4dd962022-11-16 13:10:37 -050012#define CFG_SYS_SDRAM_BASE 0x200000000
Chris Packham67b7d502022-11-05 17:24:00 +130013
Tom Rini6a5dccc2022-11-16 13:10:41 -050014#define CFG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, \
Chris Packham67b7d502022-11-05 17:24:00 +130015 115200, 230400, 460800, 921600 }
16
17/* Default Env vars */
Chris Packham67b7d502022-11-05 17:24:00 +130018
19#define BOOT_TARGET_DEVICES(func) \
20 func(USB, usb, 0) \
21 func(DHCP, dhcp, na)
22
23#include <config_distro_bootcmd.h>
24
25#define CONFIG_EXTRA_ENV_SETTINGS \
26 BOOTENV \
27 "kernel_addr_r=0x202000000\0" \
28 "fdt_addr_r=0x201000000\0" \
29 "ramdisk_addr_r=0x206000000\0" \
30 "fdtfile=marvell/" CONFIG_DEFAULT_DEVICE_TREE ".dtb\0"
31
32/*
33 * High Level Configuration Options (easy to change)
34 */
Tom Rini6a5dccc2022-11-16 13:10:41 -050035#define CFG_SYS_TCLK 325000000
Chris Packham67b7d502022-11-05 17:24:00 +130036
37#endif /* _CONFIG_MVEBU_ALLEYCAY_5_H */