Tom Rini | 10e4779 | 2018-05-06 17:58:06 -0400 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0 */ |
Ley Foon Tan | 10b6964 | 2017-04-26 02:44:46 +0800 | [diff] [blame] | 2 | /* |
| 3 | * Copyright (C) 2015-2017 Altera Corporation <www.altera.com> |
Ley Foon Tan | 10b6964 | 2017-04-26 02:44:46 +0800 | [diff] [blame] | 4 | */ |
| 5 | |
| 6 | #ifndef __CONFIG_SOCFGPA_ARRIA10_H__ |
| 7 | #define __CONFIG_SOCFGPA_ARRIA10_H__ |
| 8 | |
| 9 | #include <asm/arch/base_addr_a10.h> |
Tom Rini | d8532af | 2017-06-02 11:03:50 -0400 | [diff] [blame] | 10 | |
Ley Foon Tan | 10b6964 | 2017-04-26 02:44:46 +0800 | [diff] [blame] | 11 | /* Booting Linux */ |
| 12 | #define CONFIG_LOADADDR 0x01000000 |
| 13 | #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR |
| 14 | |
| 15 | /* |
| 16 | * U-Boot general configurations |
| 17 | */ |
Ley Foon Tan | 10b6964 | 2017-04-26 02:44:46 +0800 | [diff] [blame] | 18 | |
| 19 | /* Memory configurations */ |
| 20 | #define PHYS_SDRAM_1_SIZE 0x40000000 |
| 21 | |
Ley Foon Tan | 10b6964 | 2017-04-26 02:44:46 +0800 | [diff] [blame] | 22 | /* |
Ley Foon Tan | 10b6964 | 2017-04-26 02:44:46 +0800 | [diff] [blame] | 23 | * Serial / UART configurations |
| 24 | */ |
| 25 | #define CONFIG_SYS_NS16550_MEM32 |
| 26 | #define CONFIG_SYS_BAUDRATE_TABLE {4800, 9600, 19200, 38400, 57600, 115200} |
| 27 | |
| 28 | /* |
| 29 | * L4 OSC1 Timer 0 |
| 30 | */ |
| 31 | /* reload value when timer count to zero */ |
| 32 | #define TIMER_LOAD_VAL 0xFFFFFFFF |
| 33 | |
| 34 | /* |
| 35 | * Flash configurations |
| 36 | */ |
| 37 | #define CONFIG_SYS_MAX_FLASH_BANKS 1 |
| 38 | |
| 39 | /* The rest of the configuration is shared */ |
| 40 | #include <configs/socfpga_common.h> |
| 41 | |
| 42 | #endif /* __CONFIG_SOCFGPA_ARRIA10_H__ */ |