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Tom Rini10e47792018-05-06 17:58:06 -04001/* SPDX-License-Identifier: GPL-2.0+ */
Stefano Babic17b60372016-06-08 10:50:20 +02002/*
3 * Copyright (C) Stefano Babic <sbabic@denx.de>
Stefano Babic17b60372016-06-08 10:50:20 +02004 */
5
6
7#ifndef __PCM058_CONFIG_H
8#define __PCM058_CONFIG_H
9
Stefano Babic17b60372016-06-08 10:50:20 +020010#ifdef CONFIG_SPL
Stefano Babic17b60372016-06-08 10:50:20 +020011#define CONFIG_SYS_SPI_U_BOOT_OFFS (64 * 1024)
12#include "imx6_spl.h"
13#endif
14
15#include "mx6_common.h"
16
17/* Thermal */
18#define CONFIG_IMX_THERMAL
19
20/* Serial */
21#define CONFIG_MXC_UART
22#define CONFIG_MXC_UART_BASE UART2_BASE
Simon Glass4694a742016-10-17 20:12:39 -060023#define CONSOLE_DEV "ttymxc1"
Stefano Babic17b60372016-06-08 10:50:20 +020024
25#define PHYS_SDRAM_SIZE (1u * 1024 * 1024 * 1024)
26
27/* Early setup */
Stefano Babic17b60372016-06-08 10:50:20 +020028
29
30/* Size of malloc() pool */
31#define CONFIG_SYS_MALLOC_LEN (8 * SZ_1M)
32
33/* Ethernet */
34#define CONFIG_FEC_MXC
Stefano Babic17b60372016-06-08 10:50:20 +020035#define IMX_FEC_BASE ENET_BASE_ADDR
36#define CONFIG_FEC_XCV_TYPE RGMII
37#define CONFIG_ETHPRIME "FEC"
38#define CONFIG_FEC_MXC_PHYADDR 3
39
Stefano Babic17b60372016-06-08 10:50:20 +020040/* SPI Flash */
Stefano Babic17b60372016-06-08 10:50:20 +020041
42/* I2C Configs */
43#define CONFIG_SYS_I2C
44#define CONFIG_SYS_I2C_MXC
45#define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 2 */
46#define CONFIG_SYS_I2C_SPEED 100000
47
48#ifndef CONFIG_SPL_BUILD
Stefano Babic17b60372016-06-08 10:50:20 +020049/* Enable NAND support */
Stefano Babic17b60372016-06-08 10:50:20 +020050#define CONFIG_SYS_MAX_NAND_DEVICE 1
51#define CONFIG_SYS_NAND_BASE 0x40000000
52#define CONFIG_SYS_NAND_5_ADDR_CYCLE
53#define CONFIG_SYS_NAND_ONFI_DETECTION
Harald Seiler389d2462018-12-07 10:19:36 +010054#define CONFIG_SYS_NAND_USE_FLASH_BBT
Stefano Babic17b60372016-06-08 10:50:20 +020055#endif
56
57/* DMA stuff, needed for GPMI/MXS NAND support */
Stefano Babic17b60372016-06-08 10:50:20 +020058
59/* Filesystem support */
Stefano Babic17b60372016-06-08 10:50:20 +020060
Stefano Babic17b60372016-06-08 10:50:20 +020061/* Physical Memory Map */
Stefano Babic17b60372016-06-08 10:50:20 +020062#define PHYS_SDRAM MMDC0_ARB_BASE_ADDR
63
64#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM
65#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
66#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE
67
68#define CONFIG_SYS_INIT_SP_OFFSET \
69 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
70#define CONFIG_SYS_INIT_SP_ADDR \
71 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
72
73/* MMC Configs */
74#define CONFIG_SYS_FSL_ESDHC_ADDR 0
75#define CONFIG_SYS_FSL_USDHC_NUM 1
76
77/* Environment organization */
Stefano Babic17b60372016-06-08 10:50:20 +020078#define CONFIG_ENV_SIZE (16 * 1024)
79#define CONFIG_ENV_OFFSET (1024 * SZ_1K)
80#define CONFIG_ENV_SECT_SIZE (64 * SZ_1K)
Stefano Babic17b60372016-06-08 10:50:20 +020081#define CONFIG_SYS_REDUNDAND_ENVIRONMENT
82#define CONFIG_ENV_OFFSET_REDUND (CONFIG_ENV_OFFSET + \
83 CONFIG_ENV_SECT_SIZE)
84#define CONFIG_ENV_SIZE_REDUND CONFIG_ENV_SIZE
85
86#ifdef CONFIG_ENV_IS_IN_NAND
87#define CONFIG_ENV_OFFSET (0x1E0000)
88#define CONFIG_ENV_SECT_SIZE (128 * SZ_1K)
89#endif
90
91#endif