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Tom Rini10e47792018-05-06 17:58:06 -04001/* SPDX-License-Identifier: GPL-2.0+ */
Stefan Roese7be1b9b2016-05-25 08:21:21 +02002/*
3 * Copyright (C) 2016 Stefan Roese <sr@denx.de>
Stefan Roese7be1b9b2016-05-25 08:21:21 +02004 */
5
Stefan Roese5c806f12016-10-25 10:56:19 +02006#ifndef _CONFIG_MVEBU_ARMADA_8K_H
7#define _CONFIG_MVEBU_ARMADA_8K_H
Stefan Roese7be1b9b2016-05-25 08:21:21 +02008
9/*
10 * High Level Configuration Options (easy to change)
11 */
12#define CONFIG_SYS_TCLK 250000000 /* 250MHz */
13
Stefan Roese7be1b9b2016-05-25 08:21:21 +020014/* additions for new ARM relocation support */
15#define CONFIG_SYS_SDRAM_BASE 0x00000000
16
Stefan Roese7be1b9b2016-05-25 08:21:21 +020017/* auto boot */
18#define CONFIG_PREBOOT
19
Stefan Roese7be1b9b2016-05-25 08:21:21 +020020#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, \
21 115200, 230400, 460800, 921600 }
22
23/*
24 * For booting Linux, the board info and command line data
25 * have to be in the first 8 MB of memory, since this is
26 * the maximum mapped by the Linux kernel during initialization.
27 */
28#define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
29#define CONFIG_INITRD_TAG /* enable INITRD tag */
30#define CONFIG_SETUP_MEMORY_TAGS /* enable memory tag */
31
32#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buff Size */
Stefan Roese7be1b9b2016-05-25 08:21:21 +020033
34/*
35 * Size of malloc() pool
36 */
37#define CONFIG_SYS_MALLOC_LEN (4 << 20) /* 4MiB for malloc() */
38
39/*
40 * Other required minimal configurations
41 */
Stefan Roese7be1b9b2016-05-25 08:21:21 +020042#define CONFIG_ARCH_CPU_INIT /* call arch_cpu_init() */
Stefan Roese7be1b9b2016-05-25 08:21:21 +020043#define CONFIG_SYS_LOAD_ADDR 0x00800000 /* default load adr- 8M */
44#define CONFIG_SYS_MEMTEST_START 0x00800000 /* 8M */
45#define CONFIG_SYS_MEMTEST_END 0x00ffffff /*(_16M -1) */
46#define CONFIG_SYS_RESET_ADDRESS 0xffff0000 /* Rst Vector Adr */
47#define CONFIG_SYS_MAXARGS 32 /* max number of command args */
48
Stefan Roese7be1b9b2016-05-25 08:21:21 +020049/* End of 16M scrubbed by training in bootrom */
50#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_TEXT_BASE + 0xFF0000)
51
Stefan Roese7be1b9b2016-05-25 08:21:21 +020052#define CONFIG_ENV_OFFSET 0x180000 /* as Marvell U-Boot version */
53#define CONFIG_ENV_SIZE (64 << 10) /* 64KiB */
54#define CONFIG_ENV_SECT_SIZE (64 << 10) /* 64KiB sectors */
55
Baruch Siach0d022902018-08-14 18:05:46 +030056/* When runtime detection fails this is the default */
57#define CONFIG_SYS_MMC_ENV_DEV 0
58
Konstantin Porotchkin0edf7722017-04-05 18:22:33 +030059#define CONFIG_SYS_MAX_NAND_DEVICE 1
60#define CONFIG_SYS_NAND_MAX_CHIPS 1
61#define CONFIG_SYS_NAND_ONFI_DETECTION
62#define CONFIG_SYS_NAND_USE_FLASH_BBT
63
Stefan Roese97c3ba02017-02-20 12:25:26 +010064/*
65 * Ethernet Driver configuration
66 */
67#define CONFIG_ENV_OVERWRITE /* ethaddr can be reprogrammed */
Stefan Roese97c3ba02017-02-20 12:25:26 +010068#define CONFIG_ARP_TIMEOUT 200
69#define CONFIG_NET_RETRY_COUNT 50
70
Bin Mengabe40262017-07-19 21:50:06 +080071#define CONFIG_USB_MAX_CONTROLLER_COUNT (3 + 3)
Stefan Roese7be1b9b2016-05-25 08:21:21 +020072
73/* USB ethernet */
Stefan Roese7be1b9b2016-05-25 08:21:21 +020074
75/*
76 * SATA/SCSI/AHCI configuration
77 */
Stefan Roese7be1b9b2016-05-25 08:21:21 +020078#define CONFIG_SCSI_AHCI_PLAT
Stefan Roese7be1b9b2016-05-25 08:21:21 +020079#define CONFIG_LBA48
80#define CONFIG_SYS_64BIT_LBA
81
82#define CONFIG_SYS_SCSI_MAX_SCSI_ID 2
83#define CONFIG_SYS_SCSI_MAX_LUN 1
84#define CONFIG_SYS_SCSI_MAX_DEVICE (CONFIG_SYS_SCSI_MAX_SCSI_ID * \
85 CONFIG_SYS_SCSI_MAX_LUN)
86
Stefan Roesec20e9d52016-10-27 13:36:45 +020087/*
88 * PCI configuration
89 */
90#ifdef CONFIG_PCIE_DW_MVEBU
91#define CONFIG_E1000
Stefan Roesec20e9d52016-10-27 13:36:45 +020092#endif
93
Mark Kettenis8cfb67b2018-03-17 09:34:27 +010094#define BOOT_TARGET_DEVICES(func) \
95 func(MMC, mmc, 1) \
96 func(MMC, mmc, 0) \
97 func(USB, usb, 0) \
98 func(SCSI, scsi, 0) \
99 func(PXE, pxe, na) \
100 func(DHCP, dhcp, na)
101
102#include <config_distro_bootcmd.h>
103
104#define CONFIG_EXTRA_ENV_SETTINGS \
105 "scriptaddr=0x4d00000\0" \
106 "pxefile_addr_r=0x4e00000\0" \
107 "fdt_addr_r=0x4f00000\0" \
108 "kernel_addr_r=0x5000000\0" \
109 "ramdisk_addr_r=0x8000000\0" \
110 "fdtfile=marvell/" CONFIG_DEFAULT_DEVICE_TREE ".dtb\0" \
111 BOOTENV
112
Stefan Roese5c806f12016-10-25 10:56:19 +0200113#endif /* _CONFIG_MVEBU_ARMADA_8K_H */