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git01.mediatek.com / filogic / uboot / 145598274800b1fd6e65123f5294bc4ca00cf988 / . / include / configs / db-88f6820-gp.h
blob: c98679e1095f1d12e8d0874bce59a50b8cd90487 [file] [log] [blame]
Tom Rini10e47792018-05-06 17:58:06 -0400[diff] [blame]1/* SPDX-License-Identifier: GPL-2.0+ */
Stefan Roese073efd72015-04-25 06:29:56 +0200[diff] [blame]2/*
3 * Copyright (C) 2014 Stefan Roese <sr@denx.de>
Stefan Roese073efd72015-04-25 06:29:56 +0200[diff] [blame]4 */
5
6#ifndef _CONFIG_DB_88F6820_GP_H
7#define _CONFIG_DB_88F6820_GP_H
8
9/*
10 * High Level Configuration Options (easy to change)
11 */
Stefan Roese073efd72015-04-25 06:29:56 +0200[diff] [blame]12
Stefan Roese073efd72015-04-25 06:29:56 +0200[diff] [blame]13#define CONFIG_SYS_TCLK 250000000 /* 250MHz */
14
15/*
16 * Commands configuration
17 */
Stefan Roese073efd72015-04-25 06:29:56 +0200[diff] [blame]18
19/* I2C */
20#define CONFIG_SYS_I2C
21#define CONFIG_SYS_I2C_MVTWSI
22#define CONFIG_I2C_MVTWSI_BASE0 MVEBU_TWSI_BASE
23#define CONFIG_SYS_I2C_SLAVE 0x0
24#define CONFIG_SYS_I2C_SPEED 100000
25
Konstantin Porotchkinc6cb8b72018-08-29 16:34:53 +0300[diff] [blame]26/*
Stefan Roese1746e872015-06-29 14:58:11 +0200[diff] [blame]27 * SDIO/MMC Card Configuration
28 */
Stefan Roese1746e872015-06-29 14:58:11 +0200[diff] [blame]29#define CONFIG_SYS_MMC_BASE MVEBU_SDIO_BASE
30
Stefan Roese10aad202015-06-29 14:58:14 +0200[diff] [blame]31/*
32 * SATA/SCSI/AHCI configuration
33 */
Stefan Roese10aad202015-06-29 14:58:14 +0200[diff] [blame]34#define CONFIG_SCSI_AHCI_PLAT
35#define CONFIG_SYS_SCSI_MAX_SCSI_ID 2
36#define CONFIG_SYS_SCSI_MAX_LUN 1
37#define CONFIG_SYS_SCSI_MAX_DEVICE (CONFIG_SYS_SCSI_MAX_SCSI_ID * \
38 CONFIG_SYS_SCSI_MAX_LUN)
39
Stefan Roese2feb2262015-06-29 14:58:16 +0200[diff] [blame]40/* USB/EHCI configuration */
Stefan Roese2feb2262015-06-29 14:58:16 +0200[diff] [blame]41#define CONFIG_EHCI_IS_TDI
42
Stefan Roese073efd72015-04-25 06:29:56 +0200[diff] [blame]43/* Environment in SPI NOR flash */
Stefan Roese073efd72015-04-25 06:29:56 +0200[diff] [blame]44#define CONFIG_ENV_OFFSET (1 << 20) /* 1MiB in */
45#define CONFIG_ENV_SIZE (64 << 10) /* 64KiB */
46#define CONFIG_ENV_SECT_SIZE (256 << 10) /* 256KiB sectors */
47
Stefan Roese073efd72015-04-25 06:29:56 +0200[diff] [blame]48#define PHY_ANEG_TIMEOUT 8000 /* PHY needs a longer aneg time */
49
Stefan Roesec22b7012015-08-11 12:50:58 +0200[diff] [blame]50/* PCIe support */
Stefan Roese83097cf2015-11-25 07:37:00 +0100[diff] [blame]51#ifndef CONFIG_SPL_BUILD
Stefan Roesec22b7012015-08-11 12:50:58 +0200[diff] [blame]52#define CONFIG_PCI_SCAN_SHOW
Stefan Roese83097cf2015-11-25 07:37:00 +0100[diff] [blame]53#endif
Stefan Roesec22b7012015-08-11 12:50:58 +0200[diff] [blame]54
Kevin Smith2366bcc2015-05-18 16:09:46 +0000[diff] [blame]55/* Keep device tree and initrd in lower memory so the kernel can access them */
56#define CONFIG_EXTRA_ENV_SETTINGS \
57 "fdt_high=0x10000000\0" \
58 "initrd_high=0x10000000\0"
59
Stefan Roese5caab192015-03-25 13:35:15 +0100[diff] [blame]60/* SPL */
Stefan Roese6f7d6672015-07-20 11:20:40 +0200[diff] [blame]61/*
62 * Select the boot device here
63 *
64 * Currently supported are:
65 * SPL_BOOT_SPI_NOR_FLASH - Booting via SPI NOR flash
66 * SPL_BOOT_SDIO_MMC_CARD - Booting via SDIO/MMC card (partition 1)
67 */
68#define SPL_BOOT_SPI_NOR_FLASH 1
69#define SPL_BOOT_SDIO_MMC_CARD 2
70#define CONFIG_SPL_BOOT_DEVICE SPL_BOOT_SPI_NOR_FLASH
71
Stefan Roese5caab192015-03-25 13:35:15 +0100[diff] [blame]72/* Defines for SPL */
Stefan Roese5caab192015-03-25 13:35:15 +0100[diff] [blame]73#define CONFIG_SPL_SIZE (140 << 10)
Stefan Roese5caab192015-03-25 13:35:15 +0100[diff] [blame]74#define CONFIG_SPL_MAX_SIZE (CONFIG_SPL_SIZE - 0x0030)
75
76#define CONFIG_SPL_BSS_START_ADDR (0x40000000 + CONFIG_SPL_SIZE)
77#define CONFIG_SPL_BSS_MAX_SIZE (16 << 10)
78
Stefan Roese83097cf2015-11-25 07:37:00 +0100[diff] [blame]79#ifdef CONFIG_SPL_BUILD
80#define CONFIG_SYS_MALLOC_SIMPLE
81#endif
Stefan Roese5caab192015-03-25 13:35:15 +0100[diff] [blame]82
83#define CONFIG_SPL_STACK (0x40000000 + ((192 - 16) << 10))
84#define CONFIG_SPL_BOOTROM_SAVE (CONFIG_SPL_STACK + 4)
85
Stefan Roese6f7d6672015-07-20 11:20:40 +0200[diff] [blame]86#if CONFIG_SPL_BOOT_DEVICE == SPL_BOOT_SPI_NOR_FLASH
Stefan Roese5caab192015-03-25 13:35:15 +0100[diff] [blame]87/* SPL related SPI defines */
Stefan Roese49e7d772015-11-20 13:51:57 +0100[diff] [blame]88#define CONFIG_SYS_SPI_U_BOOT_OFFS 0x24000
Stefan Roese6f7d6672015-07-20 11:20:40 +0200[diff] [blame]89#define CONFIG_SYS_U_BOOT_OFFS CONFIG_SYS_SPI_U_BOOT_OFFS
90#endif
91
92#if CONFIG_SPL_BOOT_DEVICE == SPL_BOOT_SDIO_MMC_CARD
93/* SPL related MMC defines */
Stefan Roese6f7d6672015-07-20 11:20:40 +0200[diff] [blame]94#define CONFIG_SYS_MMC_U_BOOT_OFFS (160 << 10)
95#define CONFIG_SYS_U_BOOT_OFFS CONFIG_SYS_MMC_U_BOOT_OFFS
Stefan Roese6f7d6672015-07-20 11:20:40 +0200[diff] [blame]96#ifdef CONFIG_SPL_BUILD
97#define CONFIG_FIXED_SDHCI_ALIGNED_BUFFER 0x00180000 /* in SDRAM */
98#endif
99#endif
Stefan Roese5caab192015-03-25 13:35:15 +0100[diff] [blame]100
Stefan Roese073efd72015-04-25 06:29:56 +0200[diff] [blame]101/*
102 * mv-common.h should be defined after CMD configs since it used them
103 * to enable certain macros
104 */
105#include "mv-common.h"
106
107#endif /* _CONFIG_DB_88F6820_GP_H */