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git01.mediatek.com / filogic / uboot / 1406fa9b4acafe5f4847e85ecd0fa52649d3e67a / . / include / configs / smdkv310.h
blob: ccb89216d88bc7c91798d44d05f2dbdbfd570d8a [file] [log] [blame]
Chander Kashyapbfef54d2011-05-24 20:02:56 +0000[diff] [blame]1/*
2 * Copyright (C) 2011 Samsung Electronics
3 *
Chander Kashyap4131a772011-12-06 23:34:12 +0000[diff] [blame]4 * Configuration settings for the SAMSUNG SMDKV310 (EXYNOS4210) board.
Chander Kashyapbfef54d2011-05-24 20:02:56 +0000[diff] [blame]5 *
Wolfgang Denkd79de1d2013-07-08 09:37:19 +0200[diff] [blame]6 * SPDX-License-Identifier: GPL-2.0+
Chander Kashyapbfef54d2011-05-24 20:02:56 +0000[diff] [blame]7 */
8
9#ifndef __CONFIG_H
10#define __CONFIG_H
11
Simon Glass05b3bac32014-10-07 22:01:49 -0600[diff] [blame]12#include "exynos4-common.h"
13
14#undef CONFIG_BOARD_COMMON
Marek Vasutbc623f22015-08-19 23:27:26 +0200[diff] [blame]15#undef CONFIG_USB_GADGET_DWC2_OTG
16#undef CONFIG_USB_GADGET_DWC2_OTG_PHY
Simon Glass05b3bac32014-10-07 22:01:49 -0600[diff] [blame]17#undef CONFIG_REVISION_TAG
18#undef CONFIG_CMD_THOR_DOWNLOAD
Simon Glass05b3bac32014-10-07 22:01:49 -0600[diff] [blame]19
Chander Kashyapbfef54d2011-05-24 20:02:56 +0000[diff] [blame]20/* High Level Configuration Options */
Chander Kashyap4131a772011-12-06 23:34:12 +0000[diff] [blame]21#define CONFIG_EXYNOS4210 1 /* which is a EXYNOS4210 SoC */
Chander Kashyapbfef54d2011-05-24 20:02:56 +0000[diff] [blame]22#define CONFIG_SMDKV310 1 /* working with SMDKV310*/
23
Chander Kashyap0f3e95f2011-09-20 21:25:01 +0000[diff] [blame]24/* Mach Type */
25#define CONFIG_MACH_TYPE MACH_TYPE_SMDKV310
26
Chander Kashyapbfef54d2011-05-24 20:02:56 +0000[diff] [blame]27#define CONFIG_SYS_SDRAM_BASE 0x40000000
28#define CONFIG_SYS_TEXT_BASE 0x43E00000
29
Chander Kashyapbfef54d2011-05-24 20:02:56 +0000[diff] [blame]30/* Handling Sleep Mode*/
31#define S5P_CHECK_SLEEP 0x00000BAD
32#define S5P_CHECK_DIDLE 0xBAD00000
Rajeshwari Shindebed24422013-07-04 12:29:17 +0530[diff] [blame]33#define S5P_CHECK_LPA 0xABAD0000
Chander Kashyapbfef54d2011-05-24 20:02:56 +0000[diff] [blame]34
Chander Kashyapbfef54d2011-05-24 20:02:56 +0000[diff] [blame]35/* select serial console configuration */
Chander Kashyapbfef54d2011-05-24 20:02:56 +0000[diff] [blame]36#define CONFIG_SERIAL1 1 /* use SERIAL 1 */
Chander Kashyap4131a772011-12-06 23:34:12 +0000[diff] [blame]37#define EXYNOS4_DEFAULT_UART_OFFSET 0x010000
Chander Kashyapbfef54d2011-05-24 20:02:56 +0000[diff] [blame]38
Chander Kashyapbfef54d2011-05-24 20:02:56 +0000[diff] [blame]39/* allow to overwrite serial and ethaddr */
40#define CONFIG_ENV_OVERWRITE
41
Chander Kashyap0cd984c2011-09-20 21:25:03 +0000[diff] [blame]42/* MMC SPL */
Rajeshwari Shindebed24422013-07-04 12:29:17 +0530[diff] [blame]43#define CONFIG_SKIP_LOWLEVEL_INIT
Chander Kashyape8d043e2011-09-20 21:25:04 +0000[diff] [blame]44#define COPY_BL2_FNPTR_ADDR 0x00002488
Chander Kashyapbfef54d2011-05-24 20:02:56 +0000[diff] [blame]45
Inderpal Singh4a699c72013-04-04 23:09:21 +0000[diff] [blame]46#define CONFIG_SPL_TEXT_BASE 0x02021410
47
Chander Kashyapbfef54d2011-05-24 20:02:56 +0000[diff] [blame]48#define CONFIG_BOOTCOMMAND "fatload mmc 0 40007000 uImage; bootm 40007000"
49
50/* Miscellaneous configurable options */
Chander Kashyapbfef54d2011-05-24 20:02:56 +0000[diff] [blame]51#define CONFIG_DEFAULT_CONSOLE "console=ttySAC2,115200n8\0"
Chander Kashyapbfef54d2011-05-24 20:02:56 +0000[diff] [blame]52/* memtest works on */
53#define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE
54#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_SDRAM_BASE + 0x6000000)
55#define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 0x3E00000)
56
Chander Kashyapbfef54d2011-05-24 20:02:56 +0000[diff] [blame]57/* SMDKV310 has 4 bank of DRAM */
58#define CONFIG_NR_DRAM_BANKS 4
59#define SDRAM_BANK_SIZE (512UL << 20UL) /* 512 MB */
60#define PHYS_SDRAM_1 CONFIG_SYS_SDRAM_BASE
61#define PHYS_SDRAM_1_SIZE SDRAM_BANK_SIZE
62#define PHYS_SDRAM_2 (CONFIG_SYS_SDRAM_BASE + SDRAM_BANK_SIZE)
63#define PHYS_SDRAM_2_SIZE SDRAM_BANK_SIZE
64#define PHYS_SDRAM_3 (CONFIG_SYS_SDRAM_BASE + (2 * SDRAM_BANK_SIZE))
65#define PHYS_SDRAM_3_SIZE SDRAM_BANK_SIZE
66#define PHYS_SDRAM_4 (CONFIG_SYS_SDRAM_BASE + (3 * SDRAM_BANK_SIZE))
67#define PHYS_SDRAM_4_SIZE SDRAM_BANK_SIZE
68
69/* FLASH and environment organization */
Chander Kashyapbfef54d2011-05-24 20:02:56 +0000[diff] [blame]70
Chander Kashyapbfef54d2011-05-24 20:02:56 +0000[diff] [blame]71#define CONFIG_CLK_1000_400_200
72
73/* MIU (Memory Interleaving Unit) */
74#define CONFIG_MIU_2BIT_INTERLEAVED
75
76#define CONFIG_ENV_IS_IN_MMC 1
77#define CONFIG_SYS_MMC_ENV_DEV 0
78#define CONFIG_ENV_SIZE (16 << 10) /* 16 KB */
79#define RESERVE_BLOCK_SIZE (512)
80#define BL1_SIZE (16 << 10) /*16 K reserved for BL1*/
81#define CONFIG_ENV_OFFSET (RESERVE_BLOCK_SIZE + BL1_SIZE)
Chander Kashyapbfef54d2011-05-24 20:02:56 +0000[diff] [blame]82
Rajeshwari Shindebed24422013-07-04 12:29:17 +0530[diff] [blame]83#define CONFIG_SPL_LDSCRIPT "board/samsung/common/exynos-uboot-spl.lds"
84#define CONFIG_SPL_MAX_FOOTPRINT (14 * 1024)
85
86#define CONFIG_SYS_INIT_SP_ADDR 0x02040000
Chander Kashyapbfef54d2011-05-24 20:02:56 +0000[diff] [blame]87
Bin Meng75574052016-02-05 19:30:11 -0800[diff] [blame]88/* U-Boot copy size from boot Media to DRAM.*/
Chander Kashyapbfef54d2011-05-24 20:02:56 +0000[diff] [blame]89#define COPY_BL2_SIZE 0x80000
90#define BL2_START_OFFSET ((CONFIG_ENV_OFFSET + CONFIG_ENV_SIZE)/512)
91#define BL2_SIZE_BLOC_COUNT (COPY_BL2_SIZE/512)
92
93/* Ethernet Controllor Driver */
94#ifdef CONFIG_CMD_NET
Chander Kashyapbfef54d2011-05-24 20:02:56 +0000[diff] [blame]95#define CONFIG_SMC911X
96#define CONFIG_SMC911X_BASE 0x5000000
97#define CONFIG_SMC911X_16_BIT
98#define CONFIG_ENV_SROM_BANK 1
99#endif /*CONFIG_CMD_NET*/
Thomas Abraham4cd38a42011-06-03 22:52:17 +0000[diff] [blame]100
Chander Kashyapbfef54d2011-05-24 20:02:56 +0000[diff] [blame]101#endif /* __CONFIG_H */