wdenk | 0f8c976 | 2002-08-19 11:57:05 +0000 | [diff] [blame] | 1 | /* |
| 2 | * (C) Copyright 2001 |
| 3 | * Stefan Roese, esd gmbh germany, stefan.roese@esd-electronics.com |
| 4 | * |
| 5 | * See file CREDITS for list of people who contributed to this |
| 6 | * project. |
| 7 | * |
| 8 | * This program is free software; you can redistribute it and/or |
| 9 | * modify it under the terms of the GNU General Public License as |
| 10 | * published by the Free Software Foundation; either version 2 of |
| 11 | * the License, or (at your option) any later version. |
| 12 | * |
| 13 | * This program is distributed in the hope that it will be useful, |
| 14 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
wdenk | da55c6e | 2004-01-20 23:12:12 +0000 | [diff] [blame] | 15 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
wdenk | 0f8c976 | 2002-08-19 11:57:05 +0000 | [diff] [blame] | 16 | * GNU General Public License for more details. |
| 17 | * |
| 18 | * You should have received a copy of the GNU General Public License |
| 19 | * along with this program; if not, write to the Free Software |
| 20 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, |
| 21 | * MA 02111-1307 USA |
| 22 | */ |
| 23 | |
| 24 | /* |
| 25 | * board/config.h - configuration options, board specific |
| 26 | */ |
| 27 | |
| 28 | #ifndef __CONFIG_H |
| 29 | #define __CONFIG_H |
| 30 | |
| 31 | /* |
| 32 | * High Level Configuration Options |
| 33 | * (easy to change) |
| 34 | */ |
| 35 | |
| 36 | #define CONFIG_IOP480 1 /* This is a IOP480 CPU */ |
wdenk | da55c6e | 2004-01-20 23:12:12 +0000 | [diff] [blame] | 37 | #define CONFIG_ADCIOP 1 /* ...on a ADCIOP board */ |
wdenk | 0f8c976 | 2002-08-19 11:57:05 +0000 | [diff] [blame] | 38 | |
wdenk | da55c6e | 2004-01-20 23:12:12 +0000 | [diff] [blame] | 39 | #define CONFIG_BOARD_EARLY_INIT_F 1 /* call board_early_init_f() */ |
wdenk | 0f8c976 | 2002-08-19 11:57:05 +0000 | [diff] [blame] | 40 | |
wdenk | da55c6e | 2004-01-20 23:12:12 +0000 | [diff] [blame] | 41 | #define CONFIG_CLOCKS_IN_MHZ 1 /* clocks passsed to Linux in MHz */ |
wdenk | 0f8c976 | 2002-08-19 11:57:05 +0000 | [diff] [blame] | 42 | |
wdenk | da55c6e | 2004-01-20 23:12:12 +0000 | [diff] [blame] | 43 | #define CONFIG_CPUCLOCK 66 |
| 44 | #define CONFIG_BUSCLOCK (CONFIG_CPUCLOCK) |
wdenk | 0f8c976 | 2002-08-19 11:57:05 +0000 | [diff] [blame] | 45 | |
wdenk | da55c6e | 2004-01-20 23:12:12 +0000 | [diff] [blame] | 46 | #define CONFIG_BAUDRATE 9600 |
wdenk | 0f8c976 | 2002-08-19 11:57:05 +0000 | [diff] [blame] | 47 | #define CONFIG_BOOTDELAY 3 /* autoboot after 3 seconds */ |
| 48 | #define CONFIG_BOOTCOMMAND "bootm ffc00000" /* autoboot command */ |
| 49 | |
wdenk | da55c6e | 2004-01-20 23:12:12 +0000 | [diff] [blame] | 50 | #undef CONFIG_BOOTARGS |
wdenk | 0f8c976 | 2002-08-19 11:57:05 +0000 | [diff] [blame] | 51 | |
| 52 | #define CONFIG_LOADS_ECHO 1 /* echo on for serial download */ |
| 53 | #define CFG_LOADS_BAUD_CHANGE 1 /* allow baudrate change */ |
| 54 | |
| 55 | #undef CONFIG_WATCHDOG /* watchdog disabled */ |
| 56 | |
wdenk | da55c6e | 2004-01-20 23:12:12 +0000 | [diff] [blame] | 57 | #define CONFIG_PHY_ADDR 0 /* PHY address */ |
wdenk | 0f8c976 | 2002-08-19 11:57:05 +0000 | [diff] [blame] | 58 | |
| 59 | #define CONFIG_IPADDR 10.0.18.222 |
| 60 | #define CONFIG_SERVERIP 10.0.18.190 |
| 61 | |
| 62 | #define CONFIG_COMMANDS ( CONFIG_CMD_DFL | \ |
| 63 | CFG_CMD_DHCP | \ |
| 64 | CFG_CMD_IRQ | \ |
wdenk | da55c6e | 2004-01-20 23:12:12 +0000 | [diff] [blame] | 65 | CFG_CMD_ELF | \ |
wdenk | 0f8c976 | 2002-08-19 11:57:05 +0000 | [diff] [blame] | 66 | CFG_CMD_ASKENV ) |
| 67 | |
| 68 | /* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */ |
| 69 | #include <cmd_confdefs.h> |
| 70 | |
| 71 | /* |
| 72 | * Miscellaneous configurable options |
| 73 | */ |
| 74 | #define CFG_LONGHELP /* undef to save memory */ |
| 75 | #define CFG_PROMPT "=> " /* Monitor Command Prompt */ |
| 76 | #if (CONFIG_COMMANDS & CFG_CMD_KGDB) |
wdenk | da55c6e | 2004-01-20 23:12:12 +0000 | [diff] [blame] | 77 | #define CFG_CBSIZE 1024 /* Console I/O Buffer Size */ |
wdenk | 0f8c976 | 2002-08-19 11:57:05 +0000 | [diff] [blame] | 78 | #else |
wdenk | da55c6e | 2004-01-20 23:12:12 +0000 | [diff] [blame] | 79 | #define CFG_CBSIZE 256 /* Console I/O Buffer Size */ |
wdenk | 0f8c976 | 2002-08-19 11:57:05 +0000 | [diff] [blame] | 80 | #endif |
| 81 | #define CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16) /* Print Buffer Size */ |
| 82 | #define CFG_MAXARGS 16 /* max number of command args */ |
| 83 | #define CFG_BARGSIZE CFG_CBSIZE /* Boot Argument Buffer Size */ |
| 84 | |
wdenk | da55c6e | 2004-01-20 23:12:12 +0000 | [diff] [blame] | 85 | #define CFG_CONSOLE_INFO_QUIET 1 /* don't print console @ startup*/ |
wdenk | 0f8c976 | 2002-08-19 11:57:05 +0000 | [diff] [blame] | 86 | |
| 87 | #define CFG_MEMTEST_START 0x0400000 /* memtest works on */ |
| 88 | #define CFG_MEMTEST_END 0x0C00000 /* 4 ... 12 MB in DRAM */ |
| 89 | |
| 90 | /* The following table includes the supported baudrates */ |
wdenk | da55c6e | 2004-01-20 23:12:12 +0000 | [diff] [blame] | 91 | #define CFG_BAUDRATE_TABLE \ |
wdenk | 57b2d80 | 2003-06-27 21:31:46 +0000 | [diff] [blame] | 92 | { 300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 57600, 115200 } |
wdenk | 0f8c976 | 2002-08-19 11:57:05 +0000 | [diff] [blame] | 93 | |
wdenk | da55c6e | 2004-01-20 23:12:12 +0000 | [diff] [blame] | 94 | #define CFG_LOAD_ADDR 0x100000 /* default load address */ |
wdenk | 0f8c976 | 2002-08-19 11:57:05 +0000 | [diff] [blame] | 95 | |
wdenk | da55c6e | 2004-01-20 23:12:12 +0000 | [diff] [blame] | 96 | #define CFG_HZ 1000 /* decrementer freq: 1 ms ticks */ |
wdenk | 0f8c976 | 2002-08-19 11:57:05 +0000 | [diff] [blame] | 97 | |
| 98 | #define CONFIG_ZERO_BOOTDELAY_CHECK /* check for keypress on bootdelay==0 */ |
| 99 | |
| 100 | /*----------------------------------------------------------------------- |
| 101 | * Definitions for initial stack pointer and data area (in DPRAM) |
| 102 | */ |
wdenk | da55c6e | 2004-01-20 23:12:12 +0000 | [diff] [blame] | 103 | #define CFG_INIT_RAM_ADDR 0x00df0000 /* inside of SDRAM */ |
wdenk | 0f8c976 | 2002-08-19 11:57:05 +0000 | [diff] [blame] | 104 | #define CFG_INIT_RAM_END 0x0f00 /* End of used area in RAM */ |
| 105 | #define CFG_GBL_DATA_SIZE 64 /* size in bytes reserved for initial data */ |
| 106 | #define CFG_GBL_DATA_OFFSET (CFG_INIT_RAM_END - CFG_GBL_DATA_SIZE) |
| 107 | #define CFG_INIT_SP_OFFSET CFG_GBL_DATA_OFFSET |
| 108 | |
| 109 | /*----------------------------------------------------------------------- |
| 110 | * Start addresses for the final memory configuration |
| 111 | * (Set up by the startup code) |
| 112 | * Please note that CFG_SDRAM_BASE _must_ start at 0 |
| 113 | */ |
| 114 | #define CFG_SDRAM_BASE 0x00000000 |
| 115 | #define CFG_FLASH_BASE 0xFFFD0000 |
| 116 | #define CFG_MONITOR_BASE CFG_FLASH_BASE |
| 117 | #define CFG_MONITOR_LEN (192 << 10) /* Reserve 192 kB for Monitor */ |
| 118 | #define CFG_MALLOC_LEN (128 << 10) /* Reserve 128 kB for malloc() */ |
| 119 | |
| 120 | /* |
| 121 | * For booting Linux, the board info and command line data |
| 122 | * have to be in the first 8 MB of memory, since this is |
| 123 | * the maximum mapped by the Linux kernel during initialization. |
| 124 | */ |
wdenk | da55c6e | 2004-01-20 23:12:12 +0000 | [diff] [blame] | 125 | #define CFG_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */ |
wdenk | 0f8c976 | 2002-08-19 11:57:05 +0000 | [diff] [blame] | 126 | /*----------------------------------------------------------------------- |
| 127 | * FLASH organization |
| 128 | */ |
| 129 | #define CFG_MAX_FLASH_BANKS 2 /* max number of memory banks */ |
wdenk | da55c6e | 2004-01-20 23:12:12 +0000 | [diff] [blame] | 130 | #define CFG_MAX_FLASH_SECT 256 /* max number of sectors on one chip */ |
wdenk | 0f8c976 | 2002-08-19 11:57:05 +0000 | [diff] [blame] | 131 | |
| 132 | #define CFG_FLASH_ERASE_TOUT 120000 /* Timeout for Flash Erase (in ms) */ |
| 133 | #define CFG_FLASH_WRITE_TOUT 500 /* Timeout for Flash Write (in ms) */ |
| 134 | |
wdenk | da55c6e | 2004-01-20 23:12:12 +0000 | [diff] [blame] | 135 | #define CFG_FLASH_WORD_SIZE unsigned char /* flash word size (width) */ |
| 136 | #define CFG_FLASH_ADDR0 0x0AA9 /* 1st address for flash config cycles */ |
| 137 | #define CFG_FLASH_ADDR1 0x0556 /* 2nd address for flash config cycles */ |
wdenk | 0f8c976 | 2002-08-19 11:57:05 +0000 | [diff] [blame] | 138 | /* |
| 139 | * The following defines are added for buggy IOP480 byte interface. |
| 140 | * All other boards should use the standard values (CPCI405 etc.) |
| 141 | */ |
wdenk | da55c6e | 2004-01-20 23:12:12 +0000 | [diff] [blame] | 142 | #define CFG_FLASH_READ0 0x0002 /* 0 is standard */ |
| 143 | #define CFG_FLASH_READ1 0x0000 /* 1 is standard */ |
| 144 | #define CFG_FLASH_READ2 0x0004 /* 2 is standard */ |
wdenk | 0f8c976 | 2002-08-19 11:57:05 +0000 | [diff] [blame] | 145 | |
wdenk | da55c6e | 2004-01-20 23:12:12 +0000 | [diff] [blame] | 146 | #define CFG_FLASH_EMPTY_INFO /* print 'E' for empty sector on flinfo */ |
wdenk | 0f8c976 | 2002-08-19 11:57:05 +0000 | [diff] [blame] | 147 | |
| 148 | #if 1 /* Use NVRAM for environment variables */ |
| 149 | /*----------------------------------------------------------------------- |
| 150 | * NVRAM organization |
| 151 | */ |
| 152 | #define CFG_ENV_IS_IN_NVRAM 1 /* use NVRAM for environment vars */ |
| 153 | #define CFG_NVRAM_BASE_ADDR 0x10000000 /* NVRAM base address */ |
| 154 | #define CFG_NVRAM_SIZE (32*1024) /* NVRAM size */ |
| 155 | #define CFG_ENV_SIZE 0x0400 /* Size of Environment vars */ |
| 156 | #define CFG_ENV_ADDR \ |
| 157 | (CFG_NVRAM_BASE_ADDR+CFG_NVRAM_SIZE-CFG_ENV_SIZE) /* Env */ |
| 158 | #define CFG_NVRAM_VXWORKS_OFFS 0x7800 /* Offset for VxWorks eth-addr */ |
| 159 | |
| 160 | #else /* Use FLASH for environment variables */ |
| 161 | |
wdenk | da55c6e | 2004-01-20 23:12:12 +0000 | [diff] [blame] | 162 | #define CFG_ENV_IS_IN_FLASH 1 |
| 163 | #define CFG_ENV_OFFSET 0x00010000 /* Offset of Environment Sector */ |
wdenk | 0f8c976 | 2002-08-19 11:57:05 +0000 | [diff] [blame] | 164 | #define CFG_ENV_SIZE 0x1000 /* Total Size of Environment Sector */ |
| 165 | |
| 166 | #define CFG_ENV_SECT_SIZE 0x8000 /* see README - env sector total size */ |
| 167 | |
| 168 | #endif |
| 169 | |
| 170 | /*----------------------------------------------------------------------- |
| 171 | * PCI stuff |
| 172 | */ |
| 173 | #define CONFIG_PCI /* include pci support */ |
| 174 | #undef CONFIG_PCI_PNP |
| 175 | |
wdenk | da55c6e | 2004-01-20 23:12:12 +0000 | [diff] [blame] | 176 | #define CONFIG_NET_MULTI /* Multi ethernet cards support */ |
wdenk | 0f8c976 | 2002-08-19 11:57:05 +0000 | [diff] [blame] | 177 | |
| 178 | #define CONFIG_TULIP |
| 179 | |
wdenk | da55c6e | 2004-01-20 23:12:12 +0000 | [diff] [blame] | 180 | #define CFG_ETH_DEV_FN 0x0000 |
| 181 | #define CFG_ETH_IOBASE 0x0fff0000 |
wdenk | 0f8c976 | 2002-08-19 11:57:05 +0000 | [diff] [blame] | 182 | |
| 183 | /*----------------------------------------------------------------------- |
| 184 | * Cache Configuration |
| 185 | */ |
| 186 | #define CFG_DCACHE_SIZE 2048 /* For PLX IOP480 */ |
| 187 | #define CFG_CACHELINE_SIZE 16 /* For IBM 401/403 CPUs */ |
| 188 | #if (CONFIG_COMMANDS & CFG_CMD_KGDB) |
| 189 | #define CFG_CACHELINE_SHIFT 4 /* log base 2 of the above value */ |
| 190 | #endif |
| 191 | |
| 192 | /* |
| 193 | * Init Memory Controller: |
| 194 | * |
| 195 | * BR0/1 and OR0/1 (FLASH) |
| 196 | */ |
| 197 | |
| 198 | #define FLASH_BASE0_PRELIM 0xFFC00000 /* FLASH bank #0 */ |
| 199 | #define FLASH_BASE1_PRELIM 0xFFE00000 /* FLASH bank #1 */ |
| 200 | |
| 201 | |
| 202 | /* |
| 203 | * Internal Definitions |
| 204 | * |
| 205 | * Boot Flags |
| 206 | */ |
| 207 | #define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ |
| 208 | #define BOOTFLAG_WARM 0x02 /* Software reboot */ |
| 209 | |
| 210 | #endif /* __CONFIG_H */ |