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Steve Sakoman1b3dd5d2010-06-08 13:07:46 -07001/*
2 * (C) Copyright 2010
3 * Texas Instruments Incorporated.
4 * Aneesh V <aneesh@ti.com>
5 * Steve Sakoman <steve@sakoman.com>
6 *
7 * Configuration settings for the TI SDP4430 board.
8 *
9 * See file CREDITS for list of people who contributed to this
10 * project.
11 *
12 * This program is free software; you can redistribute it and/or
13 * modify it under the terms of the GNU General Public License as
14 * published by the Free Software Foundation; either version 2 of
15 * the License, or (at your option) any later version.
16 *
17 * This program is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 * GNU General Public License for more details.
21 *
22 * You should have received a copy of the GNU General Public License
23 * along with this program; if not, write to the Free Software
24 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
25 * MA 02111-1307 USA
26 */
27
28#ifndef __CONFIG_H
29#define __CONFIG_H
30
31/*
32 * High Level Configuration Options
33 */
34#define CONFIG_ARMV7 1 /* This is an ARM V7 CPU core */
35#define CONFIG_OMAP 1 /* in a TI OMAP core */
36#define CONFIG_OMAP44XX 1 /* which is a 44XX */
37#define CONFIG_OMAP4430 1 /* which is in a 4430 */
38#define CONFIG_4430SDP 1 /* working with SDP */
Steve Sakoman9bb65b52010-07-15 13:43:10 -070039#define CONFIG_ARCH_CPU_INIT
Steve Sakoman1b3dd5d2010-06-08 13:07:46 -070040
41/* Get CPU defs */
42#include <asm/arch/cpu.h>
43#include <asm/arch/omap4.h>
44
45/* Display CPU and Board Info */
46#define CONFIG_DISPLAY_CPUINFO 1
47#define CONFIG_DISPLAY_BOARDINFO 1
48
49/* Keep L2 Cache Disabled */
50#define CONFIG_L2_OFF 1
51
52/* Clock Defines */
53#define V_OSCK 38400000 /* Clock output from T2 */
54#define V_SCLK V_OSCK
55
56#undef CONFIG_USE_IRQ /* no support for IRQs */
57#define CONFIG_MISC_INIT_R
58
59#define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */
60#define CONFIG_SETUP_MEMORY_TAGS 1
61#define CONFIG_INITRD_TAG 1
62#define CONFIG_REVISION_TAG 1
63
64/*
65 * Size of malloc() pool
Sukumar Ghoraibbc08c42010-09-14 13:52:34 +053066 * Total Size Environment - 128k
Steve Sakoman1b3dd5d2010-06-08 13:07:46 -070067 * Malloc - add 256k
68 */
Sukumar Ghoraibbc08c42010-09-14 13:52:34 +053069#define CONFIG_ENV_SIZE (128 << 10)
Steve Sakoman1b3dd5d2010-06-08 13:07:46 -070070#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (256 << 10))
Steve Sakoman1b3dd5d2010-06-08 13:07:46 -070071 /* initial data */
72/* Vector Base */
73#define CONFIG_SYS_CA9_VECTOR_BASE SRAM_ROM_VECT_BASE
74
75/*
76 * Hardware drivers
77 */
78
79/*
80 * serial port - NS16550 compatible
81 */
82#define V_NS16550_CLK 48000000
83
84#define CONFIG_SYS_NS16550
85#define CONFIG_SYS_NS16550_SERIAL
86#define CONFIG_SYS_NS16550_REG_SIZE (-4)
87#define CONFIG_SYS_NS16550_CLK V_NS16550_CLK
88#define CONFIG_CONS_INDEX 3
89#define CONFIG_SYS_NS16550_COM3 UART3_BASE
90
Steve Sakoman1b3dd5d2010-06-08 13:07:46 -070091#define CONFIG_BAUDRATE 115200
92#define CONFIG_SYS_BAUDRATE_TABLE {4800, 9600, 19200, 38400, 57600,\
93 115200}
Steve Sakoman1b3dd5d2010-06-08 13:07:46 -070094/* I2C */
95#define CONFIG_HARD_I2C 1
96#define CONFIG_SYS_I2C_SPEED 100000
97#define CONFIG_SYS_I2C_SLAVE 1
98#define CONFIG_SYS_I2C_BUS 0
99#define CONFIG_SYS_I2C_BUS_SELECT 1
100#define CONFIG_DRIVER_OMAP34XX_I2C 1
101#define CONFIG_I2C_MULTI_BUS 1
102
Steve Sakomanf8f7c952010-07-15 12:53:42 -0700103/* TWL6030 */
104#define CONFIG_TWL6030_POWER 1
105
Steve Sakoman1b3dd5d2010-06-08 13:07:46 -0700106/* MMC */
Sukumar Ghorai7d99f692010-09-18 20:59:54 -0700107#define CONFIG_GENERIC_MMC 1
Steve Sakoman1b3dd5d2010-06-08 13:07:46 -0700108#define CONFIG_MMC 1
Sukumar Ghorai7d99f692010-09-18 20:59:54 -0700109#define CONFIG_OMAP_HSMMC 1
Steve Sakoman1b3dd5d2010-06-08 13:07:46 -0700110#define CONFIG_SYS_MMC_SET_DEV 1
111#define CONFIG_DOS_PARTITION 1
112
Sukumar Ghoraibbc08c42010-09-14 13:52:34 +0530113/* MMC ENV related defines */
114#define CONFIG_ENV_IS_IN_MMC 1
115#define CONFIG_SYS_MMC_ENV_DEV 1 /* SLOT2: eMMC(1) */
116#define CONFIG_ENV_OFFSET 0xE0000
117
Steve Sakoman69c50e82010-06-25 12:44:33 -0700118/* USB */
119#define CONFIG_MUSB_UDC 1
120#define CONFIG_USB_OMAP3 1
121
122/* USB device configuration */
123#define CONFIG_USB_DEVICE 1
124#define CONFIG_USB_TTY 1
125#define CONFIG_SYS_CONSOLE_IS_IN_ENV 1
Steve Sakoman69c50e82010-06-25 12:44:33 -0700126
Steve Sakoman1b3dd5d2010-06-08 13:07:46 -0700127/* Flash */
128#define CONFIG_SYS_NO_FLASH 1
129
130/* commands to include */
131#include <config_cmd_default.h>
132
133/* Enabled commands */
134#define CONFIG_CMD_EXT2 /* EXT2 Support */
135#define CONFIG_CMD_FAT /* FAT support */
136#define CONFIG_CMD_I2C /* I2C serial bus support */
137#define CONFIG_CMD_MMC /* MMC support */
Sukumar Ghoraibbc08c42010-09-14 13:52:34 +0530138#define CONFIG_CMD_SAVEENV
Steve Sakoman1b3dd5d2010-06-08 13:07:46 -0700139
140/* Disabled commands */
141#undef CONFIG_CMD_NET
142#undef CONFIG_CMD_FPGA /* FPGA configuration Support */
143#undef CONFIG_CMD_IMLS /* List all found images */
144
145/*
Steve Sakoman1b3dd5d2010-06-08 13:07:46 -0700146 * Environment setup
147 */
148
Steve Sakoman9abea222010-07-07 15:25:25 -0700149#define CONFIG_BOOTDELAY 3
150
Steve Sakoman1b3dd5d2010-06-08 13:07:46 -0700151#define CONFIG_ENV_OVERWRITE
152
153#define CONFIG_EXTRA_ENV_SETTINGS \
154 "loadaddr=0x82000000\0" \
155 "console=ttyS2,115200n8\0" \
Steve Sakoman69c50e82010-06-25 12:44:33 -0700156 "usbtty=cdc_acm\0" \
Steve Sakoman9abea222010-07-07 15:25:25 -0700157 "vram=16M\0" \
Sukumar Ghorai7d99f692010-09-18 20:59:54 -0700158 "mmcdev=0\0" \
Steve Sakoman1b3dd5d2010-06-08 13:07:46 -0700159 "mmcroot=/dev/mmcblk0p2 rw\0" \
160 "mmcrootfstype=ext3 rootwait\0" \
161 "mmcargs=setenv bootargs console=${console} " \
Steve Sakoman9abea222010-07-07 15:25:25 -0700162 "vram=${vram} " \
Steve Sakoman1b3dd5d2010-06-08 13:07:46 -0700163 "root=${mmcroot} " \
164 "rootfstype=${mmcrootfstype}\0" \
165 "loadbootscript=fatload mmc ${mmcdev} ${loadaddr} boot.scr\0" \
166 "bootscript=echo Running bootscript from mmc${mmcdev} ...; " \
167 "source ${loadaddr}\0" \
168 "loaduimage=fatload mmc ${mmcdev} ${loadaddr} uImage\0" \
169 "mmcboot=echo Booting from mmc${mmcdev} ...; " \
170 "run mmcargs; " \
171 "bootm ${loadaddr}\0" \
172
173#define CONFIG_BOOTCOMMAND \
Sukumar Ghorai7d99f692010-09-18 20:59:54 -0700174 "if mmc rescan ${mmcdev}; then " \
Steve Sakoman1b3dd5d2010-06-08 13:07:46 -0700175 "if run loadbootscript; then " \
176 "run bootscript; " \
177 "else " \
178 "if run loaduimage; then " \
179 "run mmcboot; " \
Steve Sakoman1b3dd5d2010-06-08 13:07:46 -0700180 "fi; " \
181 "fi; " \
182 "fi"
183
184#define CONFIG_AUTO_COMPLETE 1
185
186/*
187 * Miscellaneous configurable options
188 */
189
190#define CONFIG_SYS_LONGHELP /* undef to save memory */
191#define CONFIG_SYS_HUSH_PARSER /* use "hush" command parser */
192#define CONFIG_SYS_PROMPT_HUSH_PS2 "> "
193#define CONFIG_SYS_PROMPT "OMAP4430 SDP # "
194#define CONFIG_SYS_CBSIZE 256
195/* Print Buffer Size */
196#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
197 sizeof(CONFIG_SYS_PROMPT) + 16)
198#define CONFIG_SYS_MAXARGS 16
199/* Boot Argument Buffer Size */
200#define CONFIG_SYS_BARGSIZE (CONFIG_SYS_CBSIZE)
201
202/*
203 * memtest setup
204 */
205#define CONFIG_SYS_MEMTEST_START 0x80000000
206#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + (32 << 20))
207
208/* Default load address */
209#define CONFIG_SYS_LOAD_ADDR 0x80000000
210
211/* Use General purpose timer 1 */
Steve Sakoman58657e62010-07-20 14:56:07 -0700212#define CONFIG_SYS_TIMERBASE GPT2_BASE
Steve Sakoman1b3dd5d2010-06-08 13:07:46 -0700213#define CONFIG_SYS_PTV 2 /* Divisor: 2^(PTV+1) => 8 */
214#define CONFIG_SYS_HZ 1000
215
216/*
217 * Stack sizes
218 *
219 * The stack sizes are set up in start.S using the settings below
220 */
221#define CONFIG_STACKSIZE (128 << 10) /* Regular stack */
222#ifdef CONFIG_USE_IRQ
223#define CONFIG_STACKSIZE_IRQ (4 << 10) /* IRQ stack */
224#define CONFIG_STACKSIZE_FIQ (4 << 10) /* FIQ stack */
225#endif
226
227/*
228 * SDRAM Memory Map
229 * Even though we use two CS all the memory
230 * is mapped to one contiguous block
231 */
232#define CONFIG_NR_DRAM_BANKS 1
233
Steve Sakoman97c57f12010-09-29 20:59:51 -0700234#define CONFIG_SYS_SDRAM_BASE 0x80000000
Steve Sakomanb74d3b42010-10-27 05:04:30 -0700235#define CONFIG_SYS_INIT_RAM_ADDR 0x4030D800
236#define CONFIG_SYS_INIT_RAM_SIZE 0x800
237#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \
238 CONFIG_SYS_INIT_RAM_SIZE - \
239 GENERATED_GBL_DATA_SIZE)
Steve Sakoman97c57f12010-09-29 20:59:51 -0700240
Steve Sakoman1b3dd5d2010-06-08 13:07:46 -0700241#endif /* __CONFIG_H */