blob: 7e25797661b8892965b3c5d5a75edcf2eb1b2dd2 [file] [log] [blame]
TsiChung Liewf6afe722007-06-18 13:50:13 -05001/*
TsiChungLiew36d5b1a2007-07-05 23:17:36 -05002 * (C) Copyright 2004-2007 Freescale Semiconductor, Inc.
TsiChung Liewf6afe722007-06-18 13:50:13 -05003 * TsiChung Liew, Tsi-Chung.Liew@freescale.com.
4 *
5 * See file CREDITS for list of people who contributed to this
6 * project.
7 *
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License as
10 * published by the Free Software Foundation; either version 2 of
11 * the License, or (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
21 * MA 02111-1307 USA
22 *
23 */
24
25/*
26 * Minimal serial functions needed to use one of the uart ports
27 * as serial console interface.
28 */
29
30#include <common.h>
Alison Wang234151a2012-10-18 16:54:38 +000031#include <serial.h>
32#include <linux/compiler.h>
Wolfgang Denkc30709a2007-08-19 10:27:34 +020033
TsiChungLiew36d5b1a2007-07-05 23:17:36 -050034#include <asm/immap.h>
35#include <asm/uart.h>
TsiChung Liewf6afe722007-06-18 13:50:13 -050036
37DECLARE_GLOBAL_DATA_PTR;
38
TsiChung Liewb0c37e52010-03-09 19:24:43 -060039extern void uart_port_conf(int port);
TsiChungLiew74634c82007-08-05 03:55:21 -050040
Marek Vasut96e8ff62012-09-13 16:51:38 +020041static int mcf_serial_init(void)
TsiChung Liewf6afe722007-06-18 13:50:13 -050042{
43 volatile uart_t *uart;
44 u32 counter;
45
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +020046 uart = (volatile uart_t *)(CONFIG_SYS_UART_BASE);
TsiChung Liewf6afe722007-06-18 13:50:13 -050047
TsiChung Liewb0c37e52010-03-09 19:24:43 -060048 uart_port_conf(CONFIG_SYS_UART_PORT);
TsiChungLiew74634c82007-08-05 03:55:21 -050049
TsiChung Liewf6afe722007-06-18 13:50:13 -050050 /* write to SICR: SIM2 = uart mode,dcd does not affect rx */
51 uart->ucr = UART_UCR_RESET_RX;
52 uart->ucr = UART_UCR_RESET_TX;
53 uart->ucr = UART_UCR_RESET_ERROR;
54 uart->ucr = UART_UCR_RESET_MR;
55 __asm__("nop");
56
57 uart->uimr = 0;
58
59 /* write to CSR: RX/TX baud rate from timers */
60 uart->ucsr = (UART_UCSR_RCS_SYS_CLK | UART_UCSR_TCS_SYS_CLK);
61
62 uart->umr = (UART_UMR_BC_8 | UART_UMR_PM_NONE);
63 uart->umr = UART_UMR_SB_STOP_BITS_1;
64
65 /* Setting up BaudRate */
TsiChung Liewd6a4da02008-05-29 12:21:54 -050066 counter = (u32) ((gd->bus_clk / 32) + (gd->baudrate / 2));
67 counter = counter / gd->baudrate;
TsiChung Liewf6afe722007-06-18 13:50:13 -050068
69 /* write to CTUR: divide counter upper byte */
70 uart->ubg1 = (u8) ((counter & 0xff00) >> 8);
71 /* write to CTLR: divide counter lower byte */
72 uart->ubg2 = (u8) (counter & 0x00ff);
73
74 uart->ucr = (UART_UCR_RX_ENABLED | UART_UCR_TX_ENABLED);
75
76 return (0);
77}
78
Marek Vasut96e8ff62012-09-13 16:51:38 +020079static void mcf_serial_putc(const char c)
TsiChung Liewf6afe722007-06-18 13:50:13 -050080{
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +020081 volatile uart_t *uart = (volatile uart_t *)(CONFIG_SYS_UART_BASE);
TsiChung Liewf6afe722007-06-18 13:50:13 -050082
83 if (c == '\n')
84 serial_putc('\r');
85
86 /* Wait for last character to go. */
87 while (!(uart->usr & UART_USR_TXRDY)) ;
88
89 uart->utb = c;
90}
91
Marek Vasut96e8ff62012-09-13 16:51:38 +020092static int mcf_serial_getc(void)
TsiChung Liewf6afe722007-06-18 13:50:13 -050093{
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +020094 volatile uart_t *uart = (volatile uart_t *)(CONFIG_SYS_UART_BASE);
TsiChung Liewf6afe722007-06-18 13:50:13 -050095
96 /* Wait for a character to arrive. */
97 while (!(uart->usr & UART_USR_RXRDY)) ;
98 return uart->urb;
99}
100
Marek Vasut96e8ff62012-09-13 16:51:38 +0200101static int mcf_serial_tstc(void)
TsiChung Liewf6afe722007-06-18 13:50:13 -0500102{
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200103 volatile uart_t *uart = (volatile uart_t *)(CONFIG_SYS_UART_BASE);
TsiChung Liewf6afe722007-06-18 13:50:13 -0500104
105 return (uart->usr & UART_USR_RXRDY);
106}
107
Marek Vasut96e8ff62012-09-13 16:51:38 +0200108static void mcf_serial_setbrg(void)
TsiChung Liewf6afe722007-06-18 13:50:13 -0500109{
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200110 volatile uart_t *uart = (volatile uart_t *)(CONFIG_SYS_UART_BASE);
TsiChung Liewf6afe722007-06-18 13:50:13 -0500111 u32 counter;
112
Richard Retanubun209e53d2009-01-23 11:44:30 -0500113 /* Setting up BaudRate */
114 counter = (u32) ((gd->bus_clk / 32) + (gd->baudrate / 2));
115 counter = counter / gd->baudrate;
TsiChung Liewf6afe722007-06-18 13:50:13 -0500116
117 /* write to CTUR: divide counter upper byte */
118 uart->ubg1 = ((counter & 0xff00) >> 8);
119 /* write to CTLR: divide counter lower byte */
120 uart->ubg2 = (counter & 0x00ff);
121
122 uart->ucr = UART_UCR_RESET_RX;
123 uart->ucr = UART_UCR_RESET_TX;
124
125 uart->ucr = UART_UCR_RX_ENABLED | UART_UCR_TX_ENABLED;
126}
Marek Vasut96e8ff62012-09-13 16:51:38 +0200127
Marek Vasut96e8ff62012-09-13 16:51:38 +0200128static struct serial_device mcf_serial_drv = {
129 .name = "mcf_serial",
130 .start = mcf_serial_init,
131 .stop = NULL,
132 .setbrg = mcf_serial_setbrg,
133 .putc = mcf_serial_putc,
Marek Vasutd9c64492012-10-06 14:07:02 +0000134 .puts = default_serial_puts,
Marek Vasut96e8ff62012-09-13 16:51:38 +0200135 .getc = mcf_serial_getc,
136 .tstc = mcf_serial_tstc,
137};
138
139void mcf_serial_initialize(void)
140{
141 serial_register(&mcf_serial_drv);
142}
143
144__weak struct serial_device *default_serial_console(void)
145{
146 return &mcf_serial_drv;
147}