blob: 05b935da0a080986d66a3952c0fa1fc509df4761 [file] [log] [blame]
Stefan Roese76ba23f2014-11-07 14:10:41 +01001/*
2 * Copyright (C) 2014 Steffen Trumtrar <s.trumtrar@pengutronix.de>
3 *
Stefan Roesed3b436e2014-11-14 08:10:44 +01004 * SPDX-License-Identifier: GPL-2.0+
Stefan Roese76ba23f2014-11-07 14:10:41 +01005 */
6
7#include "socfpga_cyclone5.dtsi"
8
9/ {
10 model = "EBV SOCrates";
11 compatible = "ebv,socrates", "altr,socfpga-cyclone5", "altr,socfpga";
12
13 chosen {
14 bootargs = "console=ttyS0,115200";
15 };
16
17 memory {
18 name = "memory";
19 device_type = "memory";
20 reg = <0x0 0x40000000>; /* 1GB */
21 };
Marek Vasut567356a2015-11-23 17:06:27 +010022
23 soc {
24 u-boot,dm-pre-reloc;
25 };
Stefan Roese76ba23f2014-11-07 14:10:41 +010026};
27
28&gmac1 {
29 status = "okay";
Marek Vasut6433f592015-08-03 15:32:37 +020030 phy-mode = "rgmii";
Stefan Roese76ba23f2014-11-07 14:10:41 +010031};
32
33&i2c0 {
34 status = "okay";
35
36 rtc: rtc@68 {
37 compatible = "stm,m41t82";
38 reg = <0x68>;
39 };
40};
41
Marek Vasutaa66c842015-08-02 22:55:24 +020042&mmc0 {
Stefan Roese76ba23f2014-11-07 14:10:41 +010043 status = "okay";
Marek Vasut567356a2015-11-23 17:06:27 +010044 u-boot,dm-pre-reloc;
Stefan Roese76ba23f2014-11-07 14:10:41 +010045};
Stefan Roese2948d192014-11-07 12:37:50 +010046
47&qspi {
48 status = "okay";
49
50 flash0: n25q00@0 {
51 #address-cells = <1>;
52 #size-cells = <1>;
53 compatible = "n25q00";
54 reg = <0>; /* chip select */
55 spi-max-frequency = <50000000>;
56 m25p,fast-read;
57 page-size = <256>;
58 block-size = <16>; /* 2^16, 64KB */
59 read-delay = <4>; /* delay value in read data capture register */
60 tshsl-ns = <50>;
61 tsd2d-ns = <50>;
62 tchsh-ns = <4>;
63 tslch-ns = <4>;
64 };
65};