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Masahiro Yamadaf8efa632015-08-27 12:44:29 +09001#
2# PINCTRL infrastructure and drivers
3#
4
5menu "Pin controllers"
6
7config PINCTRL
8 bool "Support pin controllers"
9 depends on DM
10 help
11 This enables the basic support for pinctrl framework. You may want
12 to enable some more options depending on what you want to do.
13
14config PINCTRL_FULL
15 bool "Support full pin controllers"
16 depends on PINCTRL && OF_CONTROL
17 default y
18 help
19 This provides Linux-compatible device tree interface for the pinctrl
20 subsystem. This feature depends on device tree configuration because
21 it parses a device tree to look for the pinctrl device which the
22 peripheral device is associated with.
23
24 If this option is disabled (it is the only possible choice for non-DT
25 boards), the pinctrl core provides no systematic mechanism for
26 identifying peripheral devices, applying needed pinctrl settings.
27 It is totally up to the implementation of each low-level driver.
28 You can save memory footprint in return for some limitations.
29
30config PINCTRL_GENERIC
31 bool "Support generic pin controllers"
32 depends on PINCTRL_FULL
33 default y
34 help
35 Say Y here if you want to use the pinctrl subsystem through the
36 generic DT interface. If enabled, some functions become available
37 to parse common properties such as "pins", "groups", "functions" and
38 some pin configuration parameters. It would be easier if you only
39 need the generic DT interface for pin muxing and pin configuration.
40 If you need to handle vendor-specific DT properties, you can disable
41 this option and implement your own set_state callback in the pinctrl
42 operations.
43
44config PINMUX
45 bool "Support pin multiplexing controllers"
46 depends on PINCTRL_GENERIC
47 default y
48 help
49 This option enables pin multiplexing through the generic pinctrl
Marek BehĂșn44f62e92018-03-02 09:56:00 +010050 framework. Most SoCs have their own multiplexing arrangement where
51 a single pin can be used for several functions. An SoC pinctrl driver
52 allows the required function to be selected for each pin.
Simon Glass8d6510d2015-08-30 16:55:12 -060053 The driver is typically controlled by the device tree.
Masahiro Yamadaf8efa632015-08-27 12:44:29 +090054
55config PINCONF
56 bool "Support pin configuration controllers"
57 depends on PINCTRL_GENERIC
58 help
59 This option enables pin configuration through the generic pinctrl
60 framework.
61
Patrick Delaunaybcdb1042019-08-02 14:48:00 +020062config PINCONF_RECURSIVE
63 bool "Support recursive binding for pin configuration nodes"
64 depends on PINCTRL_FULL
65 default n if ARCH_STM32MP
66 default y
67 help
68 In the Linux pinctrl binding, the pin configuration nodes need not be
69 direct children of the pin controller device (may be grandchildren for
70 example). It is define is each individual pin controller device.
71 Say Y here if you want to keep this behavior with the pinconfig
72 u-class: all sub are recursivelly bounded.
73 If the option is disabled, this behavior is deactivated and only
74 the direct children of pin controller will be assumed as pin
75 configuration; you can save memory footprint when this feature is
76 no needed.
77
Patrick Delaunayd23bcf12019-08-02 14:48:00 +020078config PINCONF_RECURSIVE
79 bool "Support recursive binding for pin configuration nodes"
80 depends on PINCTRL_FULL
81 default n if ARCH_STM32MP
82 default y
83 help
84 In the Linux pinctrl binding, the pin configuration nodes need not be
85 direct children of the pin controller device (may be grandchildren for
86 example). It is define is each individual pin controller device.
87 Say Y here if you want to keep this behavior with the pinconfig
88 u-class: all sub are recursivelly bounded.
89 If the option is disabled, this behavior is deactivated and only
90 the direct children of pin controller will be assumed as pin
91 configuration; you can save memory footprint when this feature is
92 no needed.
93
Masahiro Yamadaf8efa632015-08-27 12:44:29 +090094config SPL_PINCTRL
Philipp Tomsich2b1c2042017-07-26 12:27:42 +020095 bool "Support pin controllers in SPL"
Masahiro Yamadaf8efa632015-08-27 12:44:29 +090096 depends on SPL && SPL_DM
97 help
98 This option is an SPL-variant of the PINCTRL option.
99 See the help of PINCTRL for details.
100
101config SPL_PINCTRL_FULL
102 bool "Support full pin controllers in SPL"
103 depends on SPL_PINCTRL && SPL_OF_CONTROL
Vikas Manocha50218ae2017-05-28 12:55:10 -0700104 default n if TARGET_STM32F746_DISCO
Masahiro Yamadaf8efa632015-08-27 12:44:29 +0900105 default y
106 help
107 This option is an SPL-variant of the PINCTRL_FULL option.
108 See the help of PINCTRL_FULL for details.
109
110config SPL_PINCTRL_GENERIC
111 bool "Support generic pin controllers in SPL"
112 depends on SPL_PINCTRL_FULL
113 default y
114 help
115 This option is an SPL-variant of the PINCTRL_GENERIC option.
116 See the help of PINCTRL_GENERIC for details.
117
118config SPL_PINMUX
119 bool "Support pin multiplexing controllers in SPL"
120 depends on SPL_PINCTRL_GENERIC
121 default y
122 help
123 This option is an SPL-variant of the PINMUX option.
124 See the help of PINMUX for details.
Simon Glass8d6510d2015-08-30 16:55:12 -0600125 The pinctrl subsystem can add a substantial overhead to the SPL
126 image since it typically requires quite a few tables either in the
127 driver or in the device tree. If this is acceptable and you need
128 to adjust pin multiplexing in SPL in order to boot into U-Boot,
129 enable this option. You will need to enable device tree in SPL
130 for this to work.
Masahiro Yamadaf8efa632015-08-27 12:44:29 +0900131
132config SPL_PINCONF
133 bool "Support pin configuration controllers in SPL"
134 depends on SPL_PINCTRL_GENERIC
135 help
136 This option is an SPL-variant of the PINCONF option.
137 See the help of PINCONF for details.
138
Patrick Delaunaybcdb1042019-08-02 14:48:00 +0200139config SPL_PINCONF_RECURSIVE
140 bool "Support recursive binding for pin configuration nodes in SPL"
141 depends on SPL_PINCTRL_FULL
142 default n if ARCH_STM32MP
143 default y
144 help
145 This option is an SPL-variant of the PINCONF_RECURSIVE option.
146 See the help of PINCONF_RECURSIVE for details.
147
Patrick Delaunayd23bcf12019-08-02 14:48:00 +0200148config SPL_PINCONF_RECURSIVE
149 bool "Support recursive binding for pin configuration nodes in SPL"
150 depends on SPL_PINCTRL_FULL
151 default n if ARCH_STM32MP
152 default y
153 help
154 This option is an SPL-variant of the PINCONF_RECURSIVE option.
155 See the help of PINCONF_RECURSIVE for details.
156
Masahiro Yamadaf8efa632015-08-27 12:44:29 +0900157if PINCTRL || SPL_PINCTRL
158
Philipp Tomsicha1dcf3c2017-04-19 16:46:37 +0200159config PINCTRL_AR933X
Wills Wang77ae2382016-03-16 16:59:55 +0800160 bool "QCA/Athores ar933x pin control driver"
161 depends on DM && SOC_AR933X
162 help
163 Support pin multiplexing control on QCA/Athores ar933x SoCs.
164 The driver is controlled by a device tree node which contains
165 both the GPIO definitions and pin control functions for each
166 available multiplex function.
167
Philipp Tomsicha1dcf3c2017-04-19 16:46:37 +0200168config PINCTRL_AT91
169 bool "AT91 pinctrl driver"
170 depends on DM
171 help
172 This option is to enable the AT91 pinctrl driver for AT91 PIO
173 controller.
174
175 AT91 PIO controller is a combined gpio-controller, pin-mux and
176 pin-config module. Each I/O pin may be dedicated as a general-purpose
177 I/O or be assigned to a function of an embedded peripheral. Each I/O
178 pin has a glitch filter providing rejection of glitches lower than
179 one-half of peripheral clock cycle and a debouncing filter providing
180 rejection of unwanted pulses from key or push button operations. You
181 can also control the multi-driver capability, pull-up and pull-down
182 feature on each I/O pin.
183
184config PINCTRL_AT91PIO4
185 bool "AT91 PIO4 pinctrl driver"
186 depends on DM
187 help
188 This option is to enable the AT91 pinctrl driver for AT91 PIO4
189 controller which is available on SAMA5D2 SoC.
190
191config PINCTRL_PIC32
192 bool "Microchip PIC32 pin-control and pin-mux driver"
193 depends on DM && MACH_PIC32
194 default y
195 help
196 Supports individual pin selection and configuration for each
197 remappable peripheral available on Microchip PIC32
198 SoCs. This driver is controlled by a device tree node which
Chris Packham3fede312019-01-13 22:13:26 +1300199 contains both GPIO definition and pin control functions.
Philipp Tomsicha1dcf3c2017-04-19 16:46:37 +0200200
201config PINCTRL_QCA953X
Wills Wanga56de4c2016-03-16 16:59:56 +0800202 bool "QCA/Athores qca953x pin control driver"
203 depends on DM && SOC_QCA953X
204 help
205 Support pin multiplexing control on QCA/Athores qca953x SoCs.
Wills Wanga56de4c2016-03-16 16:59:56 +0800206
Philipp Tomsicha1dcf3c2017-04-19 16:46:37 +0200207 The driver is controlled by a device tree node which contains both
208 the GPIO definitions and pin control functions for each available
209 multiplex function.
210
Andy Yan96c3da92017-06-01 18:00:10 +0800211config PINCTRL_ROCKCHIP_RV1108
212 bool "Rockchip rv1108 pin control driver"
213 depends on DM
214 help
215 Support pin multiplexing control on Rockchip rv1108 SoC.
216
217 The driver is controlled by a device tree node which contains
218 both the GPIO definitions and pin control functions for each
219 available multiplex function.
220
Masahiro Yamada0b53a752015-08-27 12:44:30 +0900221config PINCTRL_SANDBOX
222 bool "Sandbox pinctrl driver"
223 depends on SANDBOX
224 help
Philipp Tomsicha1dcf3c2017-04-19 16:46:37 +0200225 This enables pinctrl driver for sandbox.
Masahiro Yamada0b53a752015-08-27 12:44:30 +0900226
Philipp Tomsicha1dcf3c2017-04-19 16:46:37 +0200227 Currently, this driver actually does nothing but print debug
228 messages when pinctrl operations are invoked.
229
230config PINCTRL_SINGLE
231 bool "Single register pin-control and pin-multiplex driver"
232 depends on DM
Purna Chandra Mandaldb4fbfc2016-01-28 15:30:12 +0530233 help
Philipp Tomsicha1dcf3c2017-04-19 16:46:37 +0200234 This enables pinctrl driver for systems using a single register for
235 pin configuration and multiplexing. TI's AM335X SoCs are examples of
236 such systems.
237
238 Depending on the platform make sure to also enable OF_TRANSLATE and
239 eventually SPL_OF_TRANSLATE to get correct address translations.
Purna Chandra Mandaldb4fbfc2016-01-28 15:30:12 +0530240
Patrice Chotard32cf0462017-02-21 13:37:10 +0100241config PINCTRL_STI
242 bool "STMicroelectronics STi pin-control and pin-mux driver"
243 depends on DM && ARCH_STI
244 default y
245 help
246 Support pin multiplexing control on STMicrolectronics STi SoCs.
Philipp Tomsicha1dcf3c2017-04-19 16:46:37 +0200247
Patrice Chotard32cf0462017-02-21 13:37:10 +0100248 The driver is controlled by a device tree node which contains both
Philipp Tomsicha1dcf3c2017-04-19 16:46:37 +0200249 the GPIO definitions and pin control functions for each available
250 multiplex function.
Patrice Chotard32cf0462017-02-21 13:37:10 +0100251
Vikas Manocha07e9e412017-02-12 10:25:49 -0800252config PINCTRL_STM32
253 bool "ST STM32 pin control driver"
254 depends on DM
255 help
Philipp Tomsicha1dcf3c2017-04-19 16:46:37 +0200256 Supports pin multiplexing control on stm32 SoCs.
Vikas Manocha07e9e412017-02-12 10:25:49 -0800257
Philipp Tomsicha1dcf3c2017-04-19 16:46:37 +0200258 The driver is controlled by a device tree node which contains both
259 the GPIO definitions and pin control functions for each available
260 multiplex function.
Felix Brack7bc23542017-03-22 11:26:44 +0100261
Patrick Delaunayd65291b2019-03-11 11:13:15 +0100262config PINCTRL_STMFX
263 bool "STMicroelectronics STMFX I2C GPIO expander pinctrl driver"
264 depends on DM && PINCTRL_FULL
265 help
266 I2C driver for STMicroelectronics Multi-Function eXpander (STMFX)
267 GPIO expander.
268 Supports pin multiplexing control on stm32 SoCs.
269
270 The driver is controlled by a device tree node which contains both
271 the GPIO definitions and pin control functions for each available
272 multiplex function.
273
274config SPL_PINCTRL_STMFX
275 bool "STMicroelectronics STMFX I2C GPIO expander pinctrl driver in SPL"
276 depends on SPL_PINCTRL_FULL
277 help
278 This option is an SPL-variant of the SPL_PINCTRL_STMFX option.
279 See the help of PINCTRL_STMFX for details.
280
maxims@google.com54651aa2017-04-17 12:00:27 -0700281config ASPEED_AST2500_PINCTRL
282 bool "Aspeed AST2500 pin control driver"
283 depends on DM && PINCTRL_GENERIC && ASPEED_AST2500
284 default y
285 help
286 Support pin multiplexing control on Aspeed ast2500 SoC. The driver uses
287 Generic Pinctrl framework and is compatible with the Linux driver,
288 i.e. it uses the same device tree configuration.
289
Masahiro Yamadaf8efa632015-08-27 12:44:29 +0900290endif
291
Philipp Tomsich126493f2019-02-01 15:11:48 +0100292source "drivers/pinctrl/broadcom/Kconfig"
293source "drivers/pinctrl/exynos/Kconfig"
developer84c7a632018-11-15 10:07:58 +0800294source "drivers/pinctrl/mediatek/Kconfig"
Philipp Tomsich126493f2019-02-01 15:11:48 +0100295source "drivers/pinctrl/meson/Kconfig"
296source "drivers/pinctrl/mscc/Kconfig"
297source "drivers/pinctrl/mvebu/Kconfig"
Peng Fane2fd36cc2016-02-03 10:06:07 +0800298source "drivers/pinctrl/nxp/Kconfig"
Marek Vasut3066a062017-09-15 21:13:55 +0200299source "drivers/pinctrl/renesas/Kconfig"
Philipp Tomsich2b19e902019-02-01 15:15:38 +0100300source "drivers/pinctrl/rockchip/Kconfig"
Masahiro Yamada847e618b82015-09-11 20:17:32 +0900301source "drivers/pinctrl/uniphier/Kconfig"
302
Masahiro Yamadaf8efa632015-08-27 12:44:29 +0900303endmenu