Ian Campbell | 6efe369 | 2014-05-05 11:52:26 +0100 | [diff] [blame] | 1 | /* |
| 2 | * (C) Copyright 2012-2013 Henrik Nordstrom <henrik@henriknordstrom.net> |
| 3 | * (C) Copyright 2013 Luke Kenneth Casson Leighton <lkcl@lkcl.net> |
| 4 | * |
| 5 | * (C) Copyright 2007-2011 |
| 6 | * Allwinner Technology Co., Ltd. <www.allwinnertech.com> |
| 7 | * Tom Cubie <tangliang@allwinnertech.com> |
| 8 | * |
| 9 | * Some board init for the Allwinner A10-evb board. |
| 10 | * |
| 11 | * SPDX-License-Identifier: GPL-2.0+ |
| 12 | */ |
| 13 | |
| 14 | #include <common.h> |
Hans de Goede | 63deaa8 | 2014-10-02 21:13:54 +0200 | [diff] [blame] | 15 | #include <mmc.h> |
Hans de Goede | 1f24736 | 2014-06-13 22:55:51 +0200 | [diff] [blame] | 16 | #ifdef CONFIG_AXP152_POWER |
| 17 | #include <axp152.h> |
| 18 | #endif |
Henrik Nordstrom | aa382ad | 2014-06-13 22:55:50 +0200 | [diff] [blame] | 19 | #ifdef CONFIG_AXP209_POWER |
| 20 | #include <axp209.h> |
| 21 | #endif |
Oliver Schinagl | d3a558d | 2013-07-26 12:56:58 +0200 | [diff] [blame] | 22 | #ifdef CONFIG_AXP221_POWER |
| 23 | #include <axp221.h> |
| 24 | #endif |
Ian Campbell | 6efe369 | 2014-05-05 11:52:26 +0100 | [diff] [blame] | 25 | #include <asm/arch/clock.h> |
Jonathan Liu | abc1aae | 2014-06-14 08:59:09 +0200 | [diff] [blame] | 26 | #include <asm/arch/cpu.h> |
Luc Verhaegen | 4869a8c | 2014-08-13 07:55:07 +0200 | [diff] [blame] | 27 | #include <asm/arch/display.h> |
Ian Campbell | 6efe369 | 2014-05-05 11:52:26 +0100 | [diff] [blame] | 28 | #include <asm/arch/dram.h> |
Ian Campbell | b4e9f2f | 2014-05-05 14:42:31 +0100 | [diff] [blame] | 29 | #include <asm/arch/gpio.h> |
| 30 | #include <asm/arch/mmc.h> |
Jonathan Liu | abc1aae | 2014-06-14 08:59:09 +0200 | [diff] [blame] | 31 | #include <asm/io.h> |
| 32 | #include <net.h> |
Ian Campbell | 6efe369 | 2014-05-05 11:52:26 +0100 | [diff] [blame] | 33 | |
| 34 | DECLARE_GLOBAL_DATA_PTR; |
| 35 | |
| 36 | /* add board specific code here */ |
| 37 | int board_init(void) |
| 38 | { |
| 39 | int id_pfr1; |
| 40 | |
| 41 | gd->bd->bi_boot_params = (PHYS_SDRAM_0 + 0x100); |
| 42 | |
| 43 | asm volatile("mrc p15, 0, %0, c0, c1, 1" : "=r"(id_pfr1)); |
| 44 | debug("id_pfr1: 0x%08x\n", id_pfr1); |
| 45 | /* Generic Timer Extension available? */ |
| 46 | if ((id_pfr1 >> 16) & 0xf) { |
| 47 | debug("Setting CNTFRQ\n"); |
| 48 | /* CNTFRQ == 24 MHz */ |
| 49 | asm volatile("mcr p15, 0, %0, c14, c0, 0" : : "r"(24000000)); |
| 50 | } |
| 51 | |
| 52 | return 0; |
| 53 | } |
| 54 | |
| 55 | int dram_init(void) |
| 56 | { |
| 57 | gd->ram_size = get_ram_size((long *)PHYS_SDRAM_0, PHYS_SDRAM_0_SIZE); |
| 58 | |
| 59 | return 0; |
| 60 | } |
| 61 | |
Ian Campbell | b4e9f2f | 2014-05-05 14:42:31 +0100 | [diff] [blame] | 62 | #ifdef CONFIG_GENERIC_MMC |
| 63 | static void mmc_pinmux_setup(int sdc) |
| 64 | { |
| 65 | unsigned int pin; |
| 66 | |
| 67 | switch (sdc) { |
| 68 | case 0: |
| 69 | /* D1-PF0, D0-PF1, CLK-PF2, CMD-PF3, D3-PF4, D4-PF5 */ |
| 70 | for (pin = SUNXI_GPF(0); pin <= SUNXI_GPF(5); pin++) { |
| 71 | sunxi_gpio_set_cfgpin(pin, SUNXI_GPF0_SDC0); |
| 72 | sunxi_gpio_set_pull(pin, SUNXI_GPIO_PULL_UP); |
| 73 | sunxi_gpio_set_drv(pin, 2); |
| 74 | } |
| 75 | break; |
| 76 | |
| 77 | case 1: |
Hans de Goede | 4dccfd4 | 2014-10-03 16:44:57 +0200 | [diff] [blame] | 78 | /* CMD-PG3, CLK-PG4, D0~D3-PG5-8 */ |
| 79 | for (pin = SUNXI_GPG(3); pin <= SUNXI_GPG(8); pin++) { |
| 80 | sunxi_gpio_set_cfgpin(pin, SUN5I_GPG3_SDC1); |
Ian Campbell | b4e9f2f | 2014-05-05 14:42:31 +0100 | [diff] [blame] | 81 | sunxi_gpio_set_pull(pin, SUNXI_GPIO_PULL_UP); |
| 82 | sunxi_gpio_set_drv(pin, 2); |
| 83 | } |
| 84 | break; |
| 85 | |
| 86 | case 2: |
| 87 | /* CMD-PC6, CLK-PC7, D0-PC8, D1-PC9, D2-PC10, D3-PC11 */ |
| 88 | for (pin = SUNXI_GPC(6); pin <= SUNXI_GPC(11); pin++) { |
| 89 | sunxi_gpio_set_cfgpin(pin, SUNXI_GPC6_SDC2); |
| 90 | sunxi_gpio_set_pull(pin, SUNXI_GPIO_PULL_UP); |
| 91 | sunxi_gpio_set_drv(pin, 2); |
| 92 | } |
| 93 | break; |
| 94 | |
| 95 | case 3: |
| 96 | /* CMD-PI4, CLK-PI5, D0~D3-PI6~9 : 2 */ |
| 97 | for (pin = SUNXI_GPI(4); pin <= SUNXI_GPI(9); pin++) { |
| 98 | sunxi_gpio_set_cfgpin(pin, SUN4I_GPI4_SDC3); |
| 99 | sunxi_gpio_set_pull(pin, SUNXI_GPIO_PULL_UP); |
| 100 | sunxi_gpio_set_drv(pin, 2); |
| 101 | } |
| 102 | break; |
| 103 | |
| 104 | default: |
| 105 | printf("sunxi: invalid MMC slot %d for pinmux setup\n", sdc); |
| 106 | break; |
| 107 | } |
| 108 | } |
| 109 | |
| 110 | int board_mmc_init(bd_t *bis) |
| 111 | { |
Hans de Goede | 63deaa8 | 2014-10-02 21:13:54 +0200 | [diff] [blame] | 112 | __maybe_unused struct mmc *mmc0, *mmc1; |
| 113 | __maybe_unused char buf[512]; |
| 114 | |
Ian Campbell | b4e9f2f | 2014-05-05 14:42:31 +0100 | [diff] [blame] | 115 | mmc_pinmux_setup(CONFIG_MMC_SUNXI_SLOT); |
Hans de Goede | 63deaa8 | 2014-10-02 21:13:54 +0200 | [diff] [blame] | 116 | mmc0 = sunxi_mmc_init(CONFIG_MMC_SUNXI_SLOT); |
| 117 | if (!mmc0) |
| 118 | return -1; |
| 119 | |
Hans de Goede | af593e4 | 2014-10-02 20:43:50 +0200 | [diff] [blame] | 120 | #if CONFIG_MMC_SUNXI_SLOT_EXTRA != -1 |
Ian Campbell | b4e9f2f | 2014-05-05 14:42:31 +0100 | [diff] [blame] | 121 | mmc_pinmux_setup(CONFIG_MMC_SUNXI_SLOT_EXTRA); |
Hans de Goede | 63deaa8 | 2014-10-02 21:13:54 +0200 | [diff] [blame] | 122 | mmc1 = sunxi_mmc_init(CONFIG_MMC_SUNXI_SLOT_EXTRA); |
| 123 | if (!mmc1) |
| 124 | return -1; |
| 125 | #endif |
| 126 | |
| 127 | #if CONFIG_MMC_SUNXI_SLOT == 0 && CONFIG_MMC_SUNXI_SLOT_EXTRA == 2 |
| 128 | /* |
| 129 | * Both mmc0 and mmc2 are bootable, figure out where we're booting |
| 130 | * from. Try mmc0 first, just like the brom does. |
| 131 | */ |
| 132 | if (mmc_getcd(mmc0) && mmc_init(mmc0) == 0 && |
| 133 | mmc0->block_dev.block_read(0, 16, 1, buf) == 1) { |
| 134 | buf[12] = 0; |
| 135 | if (strcmp(&buf[4], "eGON.BT0") == 0) |
| 136 | return 0; |
| 137 | } |
| 138 | |
| 139 | /* no bootable card in mmc0, so we must be booting from mmc2, swap */ |
| 140 | mmc0->block_dev.dev = 1; |
| 141 | mmc1->block_dev.dev = 0; |
Ian Campbell | b4e9f2f | 2014-05-05 14:42:31 +0100 | [diff] [blame] | 142 | #endif |
| 143 | |
| 144 | return 0; |
| 145 | } |
| 146 | #endif |
| 147 | |
Hans de Goede | 3352b22 | 2014-06-13 22:55:49 +0200 | [diff] [blame] | 148 | void i2c_init_board(void) |
| 149 | { |
| 150 | sunxi_gpio_set_cfgpin(SUNXI_GPB(0), SUNXI_GPB0_TWI0); |
| 151 | sunxi_gpio_set_cfgpin(SUNXI_GPB(1), SUNXI_GPB0_TWI0); |
| 152 | clock_twi_onoff(0, 1); |
| 153 | } |
| 154 | |
Ian Campbell | 6efe369 | 2014-05-05 11:52:26 +0100 | [diff] [blame] | 155 | #ifdef CONFIG_SPL_BUILD |
| 156 | void sunxi_board_init(void) |
| 157 | { |
Henrik Nordstrom | aa382ad | 2014-06-13 22:55:50 +0200 | [diff] [blame] | 158 | int power_failed = 0; |
Ian Campbell | 6efe369 | 2014-05-05 11:52:26 +0100 | [diff] [blame] | 159 | unsigned long ramsize; |
| 160 | |
Hans de Goede | 1f24736 | 2014-06-13 22:55:51 +0200 | [diff] [blame] | 161 | #ifdef CONFIG_AXP152_POWER |
| 162 | power_failed = axp152_init(); |
| 163 | power_failed |= axp152_set_dcdc2(1400); |
| 164 | power_failed |= axp152_set_dcdc3(1500); |
| 165 | power_failed |= axp152_set_dcdc4(1250); |
| 166 | power_failed |= axp152_set_ldo2(3000); |
| 167 | #endif |
Henrik Nordstrom | aa382ad | 2014-06-13 22:55:50 +0200 | [diff] [blame] | 168 | #ifdef CONFIG_AXP209_POWER |
| 169 | power_failed |= axp209_init(); |
| 170 | power_failed |= axp209_set_dcdc2(1400); |
| 171 | power_failed |= axp209_set_dcdc3(1250); |
| 172 | power_failed |= axp209_set_ldo2(3000); |
| 173 | power_failed |= axp209_set_ldo3(2800); |
| 174 | power_failed |= axp209_set_ldo4(2800); |
| 175 | #endif |
Oliver Schinagl | d3a558d | 2013-07-26 12:56:58 +0200 | [diff] [blame] | 176 | #ifdef CONFIG_AXP221_POWER |
| 177 | power_failed = axp221_init(); |
| 178 | power_failed |= axp221_set_dcdc1(3000); |
| 179 | power_failed |= axp221_set_dcdc2(1200); |
| 180 | power_failed |= axp221_set_dcdc3(1200); |
| 181 | power_failed |= axp221_set_dcdc4(1200); |
| 182 | power_failed |= axp221_set_dcdc5(1500); |
| 183 | #if CONFIG_AXP221_DLDO1_VOLT != -1 |
| 184 | power_failed |= axp221_set_dldo1(CONFIG_AXP221_DLDO1_VOLT); |
| 185 | #endif |
| 186 | #if CONFIG_AXP221_DLDO4_VOLT != -1 |
| 187 | power_failed |= axp221_set_dldo4(CONFIG_AXP221_DLDO4_VOLT); |
| 188 | #endif |
| 189 | #if CONFIG_AXP221_ALDO1_VOLT != -1 |
| 190 | power_failed |= axp221_set_aldo1(CONFIG_AXP221_ALDO1_VOLT); |
| 191 | #endif |
| 192 | #if CONFIG_AXP221_ALDO2_VOLT != -1 |
| 193 | power_failed |= axp221_set_aldo2(CONFIG_AXP221_ALDO2_VOLT); |
| 194 | #endif |
| 195 | #if CONFIG_AXP221_ALDO3_VOLT != -1 |
| 196 | power_failed |= axp221_set_aldo3(CONFIG_AXP221_ALDO3_VOLT); |
| 197 | #endif |
| 198 | #endif |
Henrik Nordstrom | aa382ad | 2014-06-13 22:55:50 +0200 | [diff] [blame] | 199 | |
Ian Campbell | 6efe369 | 2014-05-05 11:52:26 +0100 | [diff] [blame] | 200 | printf("DRAM:"); |
| 201 | ramsize = sunxi_dram_init(); |
| 202 | printf(" %lu MiB\n", ramsize >> 20); |
| 203 | if (!ramsize) |
| 204 | hang(); |
Henrik Nordstrom | aa382ad | 2014-06-13 22:55:50 +0200 | [diff] [blame] | 205 | |
| 206 | /* |
| 207 | * Only clock up the CPU to full speed if we are reasonably |
| 208 | * assured it's being powered with suitable core voltage |
| 209 | */ |
| 210 | if (!power_failed) |
| 211 | clock_set_pll1(CONFIG_CLK_FULL_SPEED); |
| 212 | else |
| 213 | printf("Failed to set core voltage! Can't set CPU frequency\n"); |
Ian Campbell | 6efe369 | 2014-05-05 11:52:26 +0100 | [diff] [blame] | 214 | } |
| 215 | #endif |
Jonathan Liu | abc1aae | 2014-06-14 08:59:09 +0200 | [diff] [blame] | 216 | |
| 217 | #ifdef CONFIG_MISC_INIT_R |
| 218 | int misc_init_r(void) |
| 219 | { |
| 220 | if (!getenv("ethaddr")) { |
| 221 | uint32_t reg_val = readl(SUNXI_SID_BASE); |
| 222 | |
| 223 | if (reg_val) { |
| 224 | uint8_t mac_addr[6]; |
| 225 | |
| 226 | mac_addr[0] = 0x02; /* Non OUI / registered MAC address */ |
| 227 | mac_addr[1] = (reg_val >> 0) & 0xff; |
| 228 | reg_val = readl(SUNXI_SID_BASE + 0x0c); |
| 229 | mac_addr[2] = (reg_val >> 24) & 0xff; |
| 230 | mac_addr[3] = (reg_val >> 16) & 0xff; |
| 231 | mac_addr[4] = (reg_val >> 8) & 0xff; |
| 232 | mac_addr[5] = (reg_val >> 0) & 0xff; |
| 233 | |
| 234 | eth_setenv_enetaddr("ethaddr", mac_addr); |
| 235 | } |
| 236 | } |
| 237 | |
| 238 | return 0; |
| 239 | } |
| 240 | #endif |
Luc Verhaegen | 4869a8c | 2014-08-13 07:55:07 +0200 | [diff] [blame] | 241 | |
| 242 | #ifdef CONFIG_OF_BOARD_SETUP |
| 243 | int ft_board_setup(void *blob, bd_t *bd) |
| 244 | { |
| 245 | #ifdef CONFIG_VIDEO_DT_SIMPLEFB |
| 246 | return sunxi_simplefb_setup(blob); |
| 247 | #endif |
| 248 | } |
| 249 | #endif /* CONFIG_OF_BOARD_SETUP */ |