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Marek Vasut0b907502015-12-04 01:36:36 +01001/*
Marek Vasut4a7629a2015-12-04 02:55:37 +01002 * Designware DWC2 on-chip full/high speed USB device controllers
Marek Vasut0b907502015-12-04 01:36:36 +01003 * Copyright (C) 2005 for Samsung Electronics
4 *
5 * SPDX-License-Identifier: GPL-2.0+
6 */
7
Marek Vasut4811c662015-12-04 02:32:22 +01008#ifndef __DWC2_UDC_OTG_PRIV__
9#define __DWC2_UDC_OTG_PRIV__
Marek Vasut0b907502015-12-04 01:36:36 +010010
11#include <asm/errno.h>
12#include <linux/sizes.h>
13#include <linux/usb/ch9.h>
14#include <linux/usb/gadget.h>
15#include <linux/list.h>
16#include <usb/lin_gadget_compat.h>
Marek Vasutf1be9cb2015-12-04 02:51:20 +010017#include <usb/dwc2_udc.h>
Marek Vasut0b907502015-12-04 01:36:36 +010018
19/*-------------------------------------------------------------------------*/
20/* DMA bounce buffer size, 16K is enough even for mass storage */
21#define DMA_BUFFER_SIZE (16*SZ_1K)
22
23#define EP0_FIFO_SIZE 64
24#define EP_FIFO_SIZE 512
25#define EP_FIFO_SIZE2 1024
26/* ep0-control, ep1in-bulk, ep2out-bulk, ep3in-int */
Marek Vasutcb9c5d02015-12-04 02:44:33 +010027#define DWC2_MAX_ENDPOINTS 4
28#define DWC2_MAX_HW_ENDPOINTS 16
Marek Vasut0b907502015-12-04 01:36:36 +010029
30#define WAIT_FOR_SETUP 0
31#define DATA_STATE_XMIT 1
32#define DATA_STATE_NEED_ZLP 2
33#define WAIT_FOR_OUT_STATUS 3
34#define DATA_STATE_RECV 4
35#define WAIT_FOR_COMPLETE 5
36#define WAIT_FOR_OUT_COMPLETE 6
37#define WAIT_FOR_IN_COMPLETE 7
38#define WAIT_FOR_NULL_COMPLETE 8
39
40#define TEST_J_SEL 0x1
41#define TEST_K_SEL 0x2
42#define TEST_SE0_NAK_SEL 0x3
43#define TEST_PACKET_SEL 0x4
44#define TEST_FORCE_ENABLE_SEL 0x5
45
46/* ************************************************************************* */
47/* IO
48 */
49
50enum ep_type {
51 ep_control, ep_bulk_in, ep_bulk_out, ep_interrupt
52};
53
Marek Vasut5b309f72015-12-04 01:48:57 +010054struct dwc2_ep {
Marek Vasut0b907502015-12-04 01:36:36 +010055 struct usb_ep ep;
56 struct dwc2_udc *dev;
57
58 const struct usb_endpoint_descriptor *desc;
59 struct list_head queue;
60 unsigned long pio_irqs;
61 int len;
62 void *dma_buf;
63
64 u8 stopped;
65 u8 bEndpointAddress;
66 u8 bmAttributes;
67
68 enum ep_type ep_type;
69 int fifo_num;
70};
71
Marek Vasut32f931c2015-12-04 01:51:07 +010072struct dwc2_request {
Marek Vasut0b907502015-12-04 01:36:36 +010073 struct usb_request req;
74 struct list_head queue;
75};
76
77struct dwc2_udc {
78 struct usb_gadget gadget;
79 struct usb_gadget_driver *driver;
80
Marek Vasut6939aca2015-12-04 02:23:29 +010081 struct dwc2_plat_otg_data *pdata;
Marek Vasut0b907502015-12-04 01:36:36 +010082
83 int ep0state;
Marek Vasutcb9c5d02015-12-04 02:44:33 +010084 struct dwc2_ep ep[DWC2_MAX_ENDPOINTS];
Marek Vasut0b907502015-12-04 01:36:36 +010085
86 unsigned char usb_address;
87
88 unsigned req_pending:1, req_std:1;
89};
90
Marek Vasut0b907502015-12-04 01:36:36 +010091#define ep_is_in(EP) (((EP)->bEndpointAddress&USB_DIR_IN) == USB_DIR_IN)
92#define ep_index(EP) ((EP)->bEndpointAddress&0xF)
93#define ep_maxpacket(EP) ((EP)->ep.maxpacket)
94
Marek Vasut6f1c6f52015-12-04 02:21:41 +010095void otg_phy_init(struct dwc2_udc *dev);
96void otg_phy_off(struct dwc2_udc *dev);
Marek Vasut0b907502015-12-04 01:36:36 +010097
Marek Vasut4811c662015-12-04 02:32:22 +010098#endif /* __DWC2_UDC_OTG_PRIV__ */