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git01.mediatek.com / filogic / uboot / 1333f5e328c61eba5ff039429ac538c113d9d90e / . / arch / arm / dts / fsl-ls2088a-rdb-qspi.dts
blob: 72b2177b70d9bcdfd6011ca1152a695ddd36b47b [file] [log] [blame]
Tom Rini8b0c8a12018-05-06 18:27:01 -0400[diff] [blame]1// SPDX-License-Identifier: GPL-2.0+ OR X11
Priyanka Jain7d05b992017-04-28 10:41:35 +0530[diff] [blame]2/*
3 * NXP ls2080a RDB board device tree source for QSPI-boot
4 *
5 * Author: Priyanka Jain <priyanka.jain@nxp.com>
6 *
7 * Copyright 2017 NXP
Priyanka Jain7d05b992017-04-28 10:41:35 +0530[diff] [blame]8 */
9
10/dts-v1/;
11
12#include "fsl-ls2080a.dtsi"
13
14/ {
15 model = "Freescale Layerscape 2080a RDB Board";
16 compatible = "fsl,ls2080a-rdb", "fsl,ls2080a";
17
18 aliases {
19 spi0 = &qspi;
20 spi1 = &dspi;
21 };
22};
23
24&dspi {
25 bus-num = <0>;
26 status = "okay";
27
28 dflash0: n25q512a {
29 #address-cells = <1>;
30 #size-cells = <1>;
Neil Armstronga009fa72019-02-10 10:16:20 +0000[diff] [blame]31 compatible = "jedec,spi-nor";
Priyanka Jain7d05b992017-04-28 10:41:35 +0530[diff] [blame]32 spi-max-frequency = <3000000>;
33 spi-cpol;
34 spi-cpha;
35 reg = <0>;
36 };
37};
38
39&qspi {
40 bus-num = <0>;
41 status = "okay";
42
43 qflash0: s25fs512s@0 {
44 #address-cells = <1>;
45 #size-cells = <1>;
Neil Armstronga009fa72019-02-10 10:16:20 +0000[diff] [blame]46 compatible = "jedec,spi-nor";
Priyanka Jain7d05b992017-04-28 10:41:35 +0530[diff] [blame]47 spi-max-frequency = <50000000>;
48 reg = <0>;
49 };
50
51 qflash1: s25fs512s@1 {
52 #address-cells = <1>;
53 #size-cells = <1>;
Neil Armstronga009fa72019-02-10 10:16:20 +0000[diff] [blame]54 compatible = "jedec,spi-nor";
Priyanka Jain7d05b992017-04-28 10:41:35 +0530[diff] [blame]55 spi-max-frequency = <50000000>;
56 reg = <1>;
57 };
58};
Rajesh Bhagatd5691be2018-12-27 04:37:59 +0000[diff] [blame]59
Chuanhua Han6a099cc2019-07-22 16:36:46 +0800[diff] [blame]60&i2c0 {
61 status = "okay";
62 u-boot,dm-pre-reloc;
63
64 pca9547@75 {
65 compatible = "nxp,pca9547";
66 reg = <0x75>;
67 #address-cells = <1>;
68 #size-cells = <0>;
69
70 i2c@1 {
71 #address-cells = <1>;
72 #size-cells = <0>;
73 reg = <0x01>;
74 rtc@68 {
75 compatible = "dallas,ds3232";
76 reg = <0x68>;
77 };
78 };
79 };
80};
81
Rajesh Bhagatd5691be2018-12-27 04:37:59 +0000[diff] [blame]82&sata {
83 status = "okay";
84};