| Vladimir Barinov | c8c1a3e | 2015-01-12 19:17:07 +0300 | [diff] [blame] | 1 | # |
| 2 | # board/renesas/silk/Makefile | ||||
| 3 | # | ||||
| 4 | # Copyright (C) 2015 Renesas Electronics Corporation | ||||
| 5 | # Copyright (C) 2015 Cogent Embedded, Inc. | ||||
| 6 | # | ||||
| 7 | # SPDX-License-Identifier: GPL-2.0 | ||||
| 8 | # | ||||
| 9 | |||||
| Marek Vasut | 52e0ee3 | 2018-04-21 16:19:56 +0200 | [diff] [blame] | 10 | ifdef CONFIG_SPL_BUILD |
| 11 | obj-y := silk_spl.o | ||||
| 12 | else | ||||
| 13 | obj-y := silk.o qos.o | ||||
| 14 | endif | ||||