| Marcel Ziswiler | 11e2a53 | 2014-09-05 10:18:38 +0200 | [diff] [blame] | 1 | if TARGET_APALIS_T30 |
| 2 | |
| 3 | config SYS_BOARD |
| Marcel Ziswiler | 11e2a53 | 2014-09-05 10:18:38 +0200 | [diff] [blame] | 4 | default "apalis_t30" |
| 5 | |
| 6 | config SYS_VENDOR |
| Marcel Ziswiler | 11e2a53 | 2014-09-05 10:18:38 +0200 | [diff] [blame] | 7 | default "toradex" |
| 8 | |
| 9 | config SYS_CONFIG_NAME |
| Marcel Ziswiler | 11e2a53 | 2014-09-05 10:18:38 +0200 | [diff] [blame] | 10 | default "apalis_t30" |
| 11 | |
| Marcel Ziswiler | d92dee5 | 2016-11-16 17:49:23 +0100 | [diff] [blame] | 12 | config TDX_CFG_BLOCK |
| 13 | default y |
| 14 | |
| 15 | config TDX_HAVE_MMC |
| 16 | default y |
| 17 | |
| 18 | config TDX_CFG_BLOCK_DEV |
| 19 | default "0" |
| 20 | |
| 21 | config TDX_CFG_BLOCK_PART |
| 22 | default "1" |
| 23 | |
| 24 | # Toradex config block in eMMC, at the end of 1st "boot sector" |
| 25 | config TDX_CFG_BLOCK_OFFSET |
| 26 | default "-512" |
| 27 | |
| Marcel Ziswiler | 97d3449 | 2018-05-09 00:18:40 +0200 | [diff] [blame] | 28 | config APALIS_T30_PCIE_EVALBOARD_INIT |
| 29 | bool "Apalis Evaluation Board PCIe Initialisation" |
| 30 | help |
| 31 | Bring up the Apalis type specific 4 lane PCIe port as well as the |
| 32 | Apalis PCIe port with the PCIe switch as found on the Apalis |
| 33 | Evaluation board. Note that by default both those ports are also left |
| 34 | disabled in the device tree which needs changing as well for this to |
| 35 | actually work. |
| 36 | |
| Marcel Ziswiler | d92dee5 | 2016-11-16 17:49:23 +0100 | [diff] [blame] | 37 | source "board/toradex/common/Kconfig" |
| 38 | |
| Marcel Ziswiler | 11e2a53 | 2014-09-05 10:18:38 +0200 | [diff] [blame] | 39 | endif |