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git01.mediatek.com / filogic / uboot / 1234ce736c362fe962aba9f3a07ba4601bf69e4b / . / drivers / video / exynos_dp_lowlevel.h
blob: 2c0ae12db0c36f485dad5f2e8514de624e62b804 [file] [log] [blame]
Donghwa Leeb73a88b2012-07-02 01:16:02 +0000[diff] [blame]1/*
2 * Copyright (C) 2012 Samsung Electronics
3 *
4 * Author: Donghwa Lee <dh09.lee@samsung.com>
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License as
8 * published by the Free Software Foundation; either version 2 of
9 * the License, or (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
19 * MA 02111-1307 USA
20 */
21
22#ifndef _EXYNOS_EDP_LOWLEVEL_H
23#define _EXYNOS_EDP_LOWLEVEL_H
24
25void exynos_dp_enable_video_bist(unsigned int enable);
26void exynos_dp_enable_video_mute(unsigned int enable);
27void exynos_dp_reset(void);
28void exynos_dp_enable_sw_func(unsigned int enable);
29unsigned int exynos_dp_set_analog_power_down(unsigned int block, u32 enable);
30unsigned int exynos_dp_get_pll_lock_status(void);
31int exynos_dp_init_analog_func(void);
32void exynos_dp_init_hpd(void);
33void exynos_dp_init_aux(void);
34void exynos_dp_config_interrupt(void);
35unsigned int exynos_dp_get_plug_in_status(void);
36unsigned int exynos_dp_detect_hpd(void);
37unsigned int exynos_dp_start_aux_transaction(void);
38unsigned int exynos_dp_write_byte_to_dpcd(unsigned int reg_addr,
39 unsigned char data);
40unsigned int exynos_dp_read_byte_from_dpcd(unsigned int reg_addr,
41 unsigned char *data);
42unsigned int exynos_dp_write_bytes_to_dpcd(unsigned int reg_addr,
43 unsigned int count,
44 unsigned char data[]);
45unsigned int exynos_dp_read_bytes_from_dpcd( unsigned int reg_addr,
46 unsigned int count,
47 unsigned char data[]);
48int exynos_dp_select_i2c_device( unsigned int device_addr,
49 unsigned int reg_addr);
50int exynos_dp_read_byte_from_i2c(unsigned int device_addr,
51 unsigned int reg_addr, unsigned int *data);
52int exynos_dp_read_bytes_from_i2c(unsigned int device_addr,
53 unsigned int reg_addr, unsigned int count,
54 unsigned char edid[]);
55void exynos_dp_reset_macro(void);
56void exynos_dp_set_link_bandwidth(unsigned char bwtype);
57unsigned char exynos_dp_get_link_bandwidth(void);
58void exynos_dp_set_lane_count(unsigned char count);
59unsigned int exynos_dp_get_lane_count(void);
60unsigned char exynos_dp_get_lanex_pre_emphasis(unsigned char lanecnt);
61void exynos_dp_set_lane_pre_emphasis(unsigned int level,
62 unsigned char lanecnt);
63void exynos_dp_set_lanex_pre_emphasis(unsigned char request_val,
64 unsigned char lanecnt);
65void exynos_dp_set_training_pattern(unsigned int pattern);
66void exynos_dp_enable_enhanced_mode(unsigned char enable);
67void exynos_dp_enable_scrambling(unsigned int enable);
68int exynos_dp_init_video(void);
69void exynos_dp_config_video_slave_mode(struct edp_video_info *video_info);
70void exynos_dp_set_video_color_format(struct edp_video_info *video_info);
71int exynos_dp_config_video_bist(struct edp_device_info *edp_info);
72unsigned int exynos_dp_is_slave_video_stream_clock_on(void);
73void exynos_dp_set_video_cr_mn(unsigned int type, unsigned int m_value,
74 unsigned int n_value);
75void exynos_dp_set_video_timing_mode(unsigned int type);
76void exynos_dp_enable_video_master(unsigned int enable);
77void exynos_dp_start_video(void);
78unsigned int exynos_dp_is_video_stream_on(void);
Ajay Kumarca7c3e12013-02-21 23:53:04 +0000[diff] [blame]79void exynos_dp_set_base_addr(void);
Donghwa Leeb73a88b2012-07-02 01:16:02 +0000[diff] [blame]80
81#endif /* _EXYNOS_DP_LOWLEVEL_H */